New CMOS current mirrors with improved high-frequency response. - Giuseppe Di Cataldo; Gaetano Palumbo; S. Stivala (Int. J. Circuit Theory Appl., 1993)

Optimized Design of 4 Stage Dickson Voltage Multiplier. - Giuseppe Di Cataldo; Gaetano Palumbo (ISCAS, 1994)

A High-Accuracy High-Speed CMOS Current Comparator. - Giuseppe Palmisano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 1994)

Design of the Wilson and Improved Wilson MOS Current Mirrors to Reach the Best Settling time. - Gaetano Palumbo (ISCAS, 1994)

Double and triple charge pumps with mos diodes: Dynamic models to an optimized design. - Giuseppe Di Cataldo; Gaetano Palumbo (Int. J. Circuit Theory Appl., 1994)

Improved dynamic model of double and triple charge pumps to take current leakage into account. - Giuseppe Di Cataldo; Gaetano Palumbo (Int. J. Circuit Theory Appl., 1994)

A high-frequency differential sc integrator with highly accurate gain compensation. - Giuseppe Palmisano; Gaetano Palumbo; Victor da Fonte Dias (Int. J. Circuit Theory Appl., 1994)

Cmos current comparator: Simplified analysis of the delay time. - Gaetano Palumbo (Int. J. Circuit Theory Appl., 1994)

A CMOS CCII+. - Giuseppe Di Cataldo; Giuseppe Palmisano; Gaetano Palumbo (ISCAS, 1995)

A schmitt trigger by means of a ccii+. - G. Diutaldo; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 1995)

A simple cmos CCII+. - Giuseppe Palmisano; Gaetano Palumbo (Int. J. Circuit Theory Appl., 1995)

An Area Efficient Current limiter for Automotive IC: Analysis and Design. - Giovanni Calí; Giuseppe Palmisano; Gaetano Palumbo; N. Aiello (J. Circuits Syst. Comput., 1995)

Simplified model of an amplifier with two poles and a pole-zero doublet. - Giuseppe Palmisano; Gaetano Palumbo (ICECS, 1996)

Low harmonic distortion class AB CMOS current output stage. - Giuseppe Palmisano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 1996)

Area-efficient design of three- and four-stage voltage multipliers for power integrated circuits. - Giuseppe Di Cataldo; Gaetano Palumbo (Int. J. Circuit Theory Appl., 1996)

Novel Simple Models Of Cml Propagation Delay. - Massimo Alioto; Gaetano Palumbo (Great Lakes Symposium on VLSI, 1998)

A Novel 1.5-V Cmos Mixer. - Gianluca Giustolisi; Giuseppe Palmisano; Gaetano Palumbo; C. Strano (Great Lakes Symposium on VLSI, 1998)

Design of CML gate with the best propagation delay. - Massimo Alioto; Gaetano Palumbo (ICECS, 1998)

A 1.5 V CMOS voltage multiplier. - Gianluca Giustolisi; Giuseppe Palmisano; Gaetano Palumbo (ICECS, 1998)

A high-performance CMOS voltage follower. - Gaetano Palumbo; Salvatore Pennisi (ICECS, 1998)

A technique for the reduction of the input resistance of current-mode circuits. - Gaetano Palumbo; Salvatore Pennisi (ICECS, 1998)

A novel fully adjustable CMOS current Schmitt trigger with a 1·5 V power supply. - Gaetano Palumbo (Int. J. Circuit Theory Appl., 1998)

Harmonic distortion in non-linear amplifier with non-linear feedback. - Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 1998)

High-drive CMOS current amplifier. - Giuseppe Palmisano; Gaetano Palumbo; Salvatore Pennisi (IEEE J. Solid State Circuits, 1998)

Performance parameters of current operational amplifiers. - Giuseppe Palmisano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 1999)

A class AB CMOS current mirror with low-voltage capability. - Gaetano Palumbo; Salvatore Pennisi (ICECS, 1999)

A general HDL-A model of a DC-DC switching regulator core. - Gaetano Palumbo; Davide Torrisi; Riccardo Ursino (ICECS, 1999)

Highly accurate and simple models for CML and ECL gates. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1999)

High-speed voltage buffers for the experimental characterization of CMOS transconductance operational amplifiers. - Giuseppe Di Cataldo; Giuseppe Palmisano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Instrum. Meas., 1999)

Evaluation of power consumption in adiabatic circuits. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2000)

High-speed bipolar MUX modeling and design. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2000)

A fuzzy membership function circuit in SC technique. - Gianluca Giustolisi; Giuseppe Palmisano; Gaetano Palumbo (ISCAS, 2000)

Modeling of Power Consumption of Adiabatic Gates versus Fan in and Comparison with Conventional Gates. - Massimo Alioto; Gaetano Palumbo (PATMOS, 2000)

CMRR frequency response of CMOS operational transconductance amplifiers. - Gianluca Giustolisi; Giuseppe Palmisano; Gaetano Palumbo (IEEE Trans. Instrum. Meas., 2000)

Optimized design of high fan-in multiplexers using switches with driving capability. - Massimo Alioto; Gaetano Palumbo (ICECS, 2001)

Delay estimation of SCL gates with output buffer. - Massimo Alioto; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2001)

A fuzzy controller for step-up DC/DC converters. - M. Criscione; Gianluca Giustolisi; A. Lionetto; M. Muscarà; Gaetano Palumbo (ICECS, 2001)

Feedback amplifiers: a simplified analysis of harmonic distortion in the frequency domain. - Gaetano Palumbo; Salvatore Pennisi (ICECS, 2001)

Built-In Self Test for Low Cost Testing of a 60 MHz Synchronous Flash Memory. - Gaetano Palumbo; Giuseppe Introvaia; Vincenzo Mastrocola; Promod Kumar; Francesco Pipiton (IOLTW, 2001)

CML ring oscillators: oscillation frequency. - Massimo Alioto; Giuseppe Di Cataldo; Gaetano Palumbo (ISCAS (4), 2001)

Detailed frequency analysis of power supply rejection in Brokaw bandgap. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2001)

Reversed nested Miller compensation with current follower. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (ISCAS (1), 2001)

Modeling and minimization of power consumption in charge pump circuits. - Gaetano Palumbo; Domenico Pappalardo; Maurizio Gaibotti (ISCAS (4), 2001)

Analysis and optimization of a novel CMOS multiplier. - Gianluca Giustolisi; Giuseppe Palmisano; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2001)

A high‐performance CMOS CCII. - Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2001)

Power estimation in adiabatic circuits: a simple and accurate model. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2001)

Low Power Strategy for a TFT Controller. - Giuseppe Notarangelo; Marco Gibilaro; Francesco Pappalardo 002; Agatino Pennisi; Gaetano Palumbo (DSD, 2002)

Design guidelines for bipolar frequency dividers. - Massimo Alioto; Giuseppe Di Cataldo; Gaetano Palumbo (ICECS, 2002)

Analysis and comparison of low-voltage CML D-latch. - Massimo Alioto; Rosario Mita; Gaetano Palumbo (ICECS, 2002)

A high-performance buffer for non-volatile memories. - L. De Ambrogi; S. Nicosia; Giovanni Pagano; Gaetano Palumbo (ICECS, 2002)

Statistical analysis of the resolution in a current-mode ADC. - Gianluca Giustolisi; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2002)

Hybrid nested Miller compensation with nulling resistors. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2002)

Comparison between Miller integrator cells using VOAs and CFOAs. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2002)

A novel pseudo random bit generator for cryptography applications. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi; Massimo Poli (ICECS, 2002)

Propagation delay model of current driven RC chain. - Gaetano Palumbo; Massimo Poli (ICECS, 2002)

Voltage regulator based on an high-efficiency adaptive charge pump. - Gaetano Palumbo; Domenico Pappalardo; Maurizio Gaibotti (ICECS, 2002)

Power-delay trade-offs in SCL gates. - Massimo Alioto; Gaetano Palumbo (ISCAS (3), 2002)

Analysis and optimization of gain-boosted telescopic amplifiers. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2002)

Analysis of power supply noise attenuation in a PTAT current source. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2002)

Evaluation on power reduction applying gated clock approaches. - Gaetano Palumbo; Francesco Pappalardo 002; S. Sannella (ISCAS (4), 2002)

Modeling Propagation Delay of MUX, XOR, and D-Latch Source-Coupled Logic Gates. - Massimo Alioto; Gaetano Palumbo (PATMOS, 2002)

An Approach to Energy Consumption Modeling in RC Ladder Circuits. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (PATMOS, 2002)

Modeling of Propagation Delay of a First Order Circuit with a Ramp Input. - Rosario Mita; Gaetano Palumbo (PATMOS, 2002)

Modelling of source-coupled logic gates. - Massimo Alioto; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2002)

Current-mode A/D fuzzy converter. - Gianluca Giustolisi; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Fuzzy Syst., 2002)

Analysis and comparison on full adder block in submicron technology. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Design of MUX, XOR and D-latch SCL gates. - Massimo Alioto; Gaetano Palumbo (ISCAS (5), 2003)

A 1-V CMOS output stage with high linearity. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2003)

Design of low-voltage low-power SC filters for high-frequency applications. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2003)

A novel 1-V class-AB transconductor for improving speed performance in SC applications. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2003)

A new method for evaluating harmonic distortion in push-pull output stages. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS (1), 2003)

Performance comparison of Tow-Thomas biquad filters based on VOAs and CFOAs. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (ISCAS (1), 2003)

Analysis, modelling and optimization of a gain boosted telescopic amplifier. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2003)

Performance evaluation of the low-voltage CML D-latch topology. - Massimo Alioto; Rosario Mita; Gaetano Palumbo (Integr., 2003)

A low-voltage low-power voltage reference based on subthreshold MOSFETs. - Gianluca Giustolisi; Gaetano Palumbo; M. Criscione; F. Cutri (IEEE J. Solid State Circuits, 2003)

1.5-V CMOS CCII+ with high current-driving capability. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

Design guidelines for reversed nested Miller compensation in three-stage amplifiers. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2003)

A 1.35-V sense amplifier for non volatile memories based on current mode approach. - Antonino Conte; Gianbattista Lo Giudice; Gaetano Palumbo; Alfredo Signorello (ESSCIRC, 2004)

A gate-level strategy to design Carry Select Adders. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (ISCAS (2), 2004)

Low-voltage linear voltage regulator suitable for memories. - Walter Aloisi; Stello Matteo Billé; Gaetano Palumbo (ISCAS (1), 2004)

Sigma-Delta A/D fuzzy converter. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS (4), 2004)

Harmonic distortion in three-stage nested-Miller-compensated amplifiers. - Gaetano Palumbo; Salvatore Pennisi (ISCAS (1), 2004)

Exploiting the high-frequency performance of low-voltage low-power SC filters. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

Effect of CFOA nonidealities in Miller integrator cells. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2004)

Evaluation of energy consumption in RC ladder circuits driven by a ramp input. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Guidelines for designing class-AB output stages. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (ECCTD, 2005)

Distortion analysis of three-stage amplifiers with reversed nested-Miller compensation. - Salvatore Omar Cannizzaro; Gaetano Palumbo; Salvatore Pennisi (ECCTD, 2005)

New analytical approach to evaluate harmonic distortion in nonlinear feedback amplifiers. - Salvatore Omar Cannizzaro; Gaetano Palumbo; Salvatore Pennisi (ECCTD, 2005)

Statistical analysis of CMOS current reference. - Gianluca Giustolisi; Gaetano Palumbo; Maurizio Gaibotti; Michelangelo Pisasale (ECCTD, 2005)

Optimized design of ECL gates with a power constraint. - Alfio Dario Grasso; Gaetano Palumbo (ECCTD, 2005)

A fast active quenching and recharging circuit for single-photon avalanche diodes. - Rosario Mita; Gaetano Palumbo; Giorgio Fallica (ECCTD, 2005)

Analysis and optimization of a low-voltage class-AB output stage. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (ICECS, 2005)

Comparison of methods for predicting distortion in class-AB stages. - Gianluca Giustolisi; Gaetano Palumbo (ICECS, 2005)

A novel model for single photon detectors. - Rosario Mita; Andrea Oliveri; Gaetano Palumbo; Pier Giorgio Fallica (ICECS, 2005)

VHDL-based modeling of a DC-DC boost converter. - Rosario Mita; Gaetano Palumbo (ICECS, 2005)

Behavioral model of charge pumps with VHDL. - Rosario Mita; Gaetano Palumbo; Melita Pennisi (ICECS, 2005)

A comparison between amoled poly-TFT driver circuits. - Gaetano Palumbo; Melita Pennisi (ICECS, 2005)

Design strategy to minimize rise time and silicon area of charge pump with only capacitive loads. - Gaetano Palumbo; Domenico Pappalardo; Luigi Innacolo (ICECS, 2005)

Design techniques for low-power cascaded CML gates. - Massimo Alioto; Gaetano Palumbo (ISCAS (5), 2005)

Well-defined design procedure for a three-stage CMOS OTA. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (ISCAS (3), 2005)

Optimized design of source coupled logic gates in GaAs HEMT technology. - Gaetano Palumbo; Pasquale Tommasino; Alessandro Trifiletti (ISCAS (4), 2005)

Energy Consumption in RC Tree Circuits with Exponential Inputs: An Analytical Model. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (PATMOS, 2005)

Power-delay optimization of D-latch/MUX source coupled logic gates. - Massimo Alioto; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2005)

Modelling and design considerations on CML gates under high-current effects. - Massimo Alioto; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2005)

Efficiency model of boost dc-dc PWM converters. - Walter Aloisi; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2005)

A high-performance very low-voltage current sense amplifier for nonvolatile memories. - Antonino Conte; Gianbattista Lo Giudice; Gaetano Palumbo; Alfredo Signorello (IEEE J. Solid State Circuits, 2005)

Design and Comparison of Very Low-Voltage CMOS Output Stages. - Walter Aloisi; Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2005)

Nonidealities of Tow-Thomas biquads Using VOA- and CFOA-based Miller integrators. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

Low-voltage high-drive CMOS current feedback op-amp. - Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2005)

A Design Methodology for High-Speed Low-Power MCML Frequency Dividers. - Massimo Alioto; Rosario Mita; Gaetano Palumbo (ICECS, 2006)

Modeling of Delay Variability Due to Supply Variations in Pass-Transistor and Static Full Adders. - Massimo Alioto; Gaetano Palumbo (ICECS, 2006)

RC-Chain: a Simple Model of Delay with a Ramp Input. - Giuseppe Di Cataldo; Rosario Mita; Gaetano Palumbo; Massimo Poli (ICECS, 2006)

Modeling of Feedback Analog Circuits with VHDL. - Giuseppe Di Cataldo; Rosario Mita; Gaetano Palumbo; Melita Pennisi (ICECS, 2006)

NMOS Low Drop-Out Regulator with Dynamic Biasing. - Gianluca Giustolisi; Gaetano Palumbo; Christian Falconi; Arnaldo D'Amico (ICECS, 2006)

Analysis of Harmonic Distortion in the Colpitts Oscillator. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (ICECS, 2006)

Delay uncertainty due to supply variations in static and dynamic full adders. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2006)

Nanometer MCML gates: models and design considerations. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2006)

Efficient output transition time modeling in CMOS gates with ramp/exponential inputs. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (ISCAS, 2006)

Active reversed nested Miller compensation for three-stage amplifiers. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2006)

Analysis and evaluation of harmonic distortion in the tunnel diode oscillator. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (ISCAS, 2006)

A fast driver circuit for single-photon sensors. - Rosario Mita; Gaetano Palumbo; Pier Giorgio Fallica (Microelectron. J., 2006)

Design of High-Speed Power-Efficient MOS Current-Mode Logic Frequency Dividers. - Massimo Alioto; Rosario Mita; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Design strategies of cascaded CML gates. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Effects of nonlinear feedback in the frequency domain. - Salvatore Omar Cannizzaro; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Distortion analysis of Miller-compensated three-stage amplifiers. - Salvatore Omar Cannizzaro; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2006)

Three-Stage CMOS OTA for Large Capacitive Loads With Efficient Frequency Compensation Scheme. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Charge pump circuits with only capacitive loads: optimized design. - Gaetano Palumbo; Domenico Pappalardo (IEEE Trans. Circuits Syst. II Express Briefs, 2006)

Impact of Supply Voltage Variations on Full Adder Delay: Analysis and Comparison. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Energy Consumption in RC Tree Circuits. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Very high-speed carry computation based on mixed dynamic/transmission-gate Full Adders. - Massimo Alioto; Gaetano Palumbo (ECCTD, 2007)

Energy consumption in RLC tree circuits. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (ECCTD, 2007)

A generalization of Miller formulae for nonlinear feedback networks. - Giuseppe Di Cataldo; Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (ECCTD, 2007)

LDO compensation strategy based on current buffer/amplifiers. - Gianluca Giustolisi; Gaetano Palumbo; Ester Spitale (ECCTD, 2007)

Highly-accurate propagation delay analytical model of an RC-circuit with a ramp input. - Rosario Mita; Gaetano Palumbo (ECCTD, 2007)

Distortion analysis in the frequency domain of a Gm-C biquad. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (ECCTD, 2007)

Efficient and Accurate Models of Output Transition Time in CMOS Logic. - Massimo Alioto; Massimo Poli; Gaetano Palumbo (ICECS, 2007)

High-Speed/Low-Power Mixed Full Adder Chains: Analysis and Comparison versus Technology. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2007)

Design of Fast Large Fan-In CMOS Multiplexers Accounting for Interconnects. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2007)

Delay Variability Due to Supply Variations in Transmission-Gate Full Adders. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2007)

Miller Compensation: Optimization with Current Buffer/Amplifier. - Walter Aloisi; Giuseppe Di Cataldo; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2007)

Rosenstark-like Representation of Feedback Amplifier Resistance. - Christian Falconi; Arnaldo D'Amico; Gianluca Giustolisi; Gaetano Palumbo (ISCAS, 2007)

Mixed Full Adder topologies for high-performance low-power arithmetic circuits. - Massimo Alioto; Giuseppe Di Cataldo; Gaetano Palumbo (Microelectron. J., 2007)

Interconnect-Aware Design of Fast Large Fan-In CMOS Multiplexers. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Design Procedures for Three-Stage CMOS OTAs With Nested-Miller Compensation. - Salvatore Omar Cannizzaro; Alfio Dario Grasso; Rosario Mita; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Resistance of Feedback Amplifiers: A Novel Representation. - Arnaldo D'Amico; Christian Falconi; Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Advances in Reversed Nested Miller Compensation. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2007)

Propagation Delay of an RC-Chain With a Ramp Input. - Rosario Mita; Gaetano Palumbo; Massimo Poli (IEEE Trans. Circuits Syst. II Express Briefs, 2007)

Analysis of the impact of process variations on static logic circuits versus fan-in. - Massimo Alioto; Gaetano Palumbo; Melita Pennisi (ICECS, 2008)

Energy evaluation in RLC tree circuits with exponential input. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (ICECS, 2008)

Design guidelines for high-speed Transmission-gate latches: Analysis and comparison. - Gaetano Palumbo; Melita Pennisi (ICECS, 2008)

Design guidelines for minimum harmonic distortion in a wien oscillator with automatic amplitude control system. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (ICECS, 2008)

Power-delay optimization in MCML tapered buffers. - Massimo Alioto; Gaetano Palumbo (ISCAS, 2008)

Explicit energy evaluation in RLC tree circuits with ramp inputs. - Massimo Alioto; Massimo Poli; Gaetano Palumbo (ISCAS, 2008)

Low-voltage LDO Compensation Strategy based on Current Amplifiers. - Gianluca Giustolisi; Gaetano Palumbo; Ester Spitale (ISCAS, 2008)

Understanding the Effect of Intradie Random Process Variations in Nanometer Domino Logic. - Massimo Alioto; Gaetano Palumbo; Melita Pennisi (PATMOS, 2008)

Design methodology of Miller frequency compensation with current buffer/amplifier. - Walter Aloisi; Gaetano Palumbo; Salvatore Pennisi (IET Circuits Devices Syst., 2008)

Accurate model for single-photon avalanche diodes. - Rosario Mita; Gaetano Palumbo; Pier Giorgio Fallica (IET Circuits Devices Syst., 2008)

Single Miller capacitor frequency compensation with nulling resistor for three-stage amplifiers. - Salvatore Omar Cannizzaro; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2008)

An approach to model high-frequency distortion in negative-feedback amplifiers. - Salvatore Omar Cannizzaro; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2008)

Analytical comparison of frequency compensation techniques in three-stage amplifiers. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2008)

AMOLED pixel driver circuits based on poly-Si TFTs: A comparison. - Gaetano Palumbo; Melita Pennisi (Integr., 2008)

Power-Aware Design of Nanometer MCML Tapered Buffers. - Massimo Alioto; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Comparison of the Frequency Compensation Techniques for CMOS Two-Stage Miller OTAs. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Wien-Type Oscillators: Evaluation and Optimization of Harmonic Distortion. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Miller Theorem for Weakly Nonlinear Feedback Circuits and Application to CE Amplifier. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

High-Speed and Compact Quenching Circuit for Single-Photon Avalanche Diodes. - Rosario Mita; Gaetano Palumbo (IEEE Trans. Instrum. Meas., 2008)

Impact of clock slope on energy/delay of pulsed flip-flops and optimum clock domain design. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (ECCTD, 2009)

Correct procedures to evaluate the effect of intradie variations on the delay variability of digital circuits. - Massimo Alioto; Elio Consoli; Gaetano Palumbo; Melita Pennisi (ECCTD, 2009)

Optimum clock slope for flip-flops within a clock domain: Analysis and a case study. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (ICECS, 2009)

Analysis of the impact of random process variations in CMOS tapered buffers. - Massimo Alioto; Gaetano Palumbo; Melita Pennisi (ICECS, 2009)

An efficient RNM compensation topology with voltage buffer and nulling resistors for large-capacitive-load three-stage OTAs. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2009)

A high-speed low-power output buffer amplifier for large-size LCD applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2009)

Exploitation of the phasor approach for closed-form solution of the Van der Pol's oscillator and sinusoidal oscillators with high-order nonlinearity. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (ICECS, 2009)

Metrics and Design Considerations on the Energy-delay Tradeoff of Digital Circuits. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (ISCAS, 2009)

Step-response Optimization Techniques for Low-power Three-stage Operational Amplifiers for Large Capacitive Load Applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2009)

A New Advanced RNMC Technique with Dual-active Current and Voltage Buffers for Low-power High-load Three-stage Amplifiers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2009)

Approach to analyse and design nearly sinusoidal oscillators. - Gaetano Palumbo; Melita Pennisi; Salvatore Pennisi (IET Circuits Devices Syst., 2009)

Propagation delay of an RC-circuit with a ramp input: An analytical very accurate and simple model. - Rosario Mita; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2009)

Improved Power-Efficient RNMC Technique with voltage Buffer and Nulling resistors for Low-Power High-Load Three-Stage amplifiers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (J. Circuits Syst. Comput., 2009)

Analysis and Modeling of Energy Consumption in RLC Tree Circuits. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (IEEE Trans. Very Large Scale Integr. Syst., 2009)

Clock distribution in clock domains with Dual-Edge-Triggered Flip-Flops to improve energy-efficiency. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (ISCAS, 2010)

Analytical figure of merit evaluation of RNMC networks for low-power three-stage OTAs. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2010)

A novel low-power high-speed rail-to-rail class-B buffer amplifier for LCD output drivers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2010)

Low-power dual-active class-AB buffer amplifier with self-biasing network for LCD column drivers. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2010)

Physical Design Aware Comparison of Flip-Flops for High-Speed Energy-Efficient VLSI Circuits. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (PATMOS, 2010)

Step-response optimisation techniques for low-power, high-load, three-stage operational amplifiers driving large capacitive loads. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IET Circuits Devices Syst., 2010)

Simple and accurate modeling of the output transition time in nanometer CMOS gates. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (Int. J. Circuit Theory Appl., 2010)

Analytical comparison of reversed nested Miller frequency compensation techniques. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2010)

Improved Low-Power High-Speed Buffer amplifier with slew-Rate Enhancement for LCD Applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (J. Circuits Syst. Comput., 2010)

Flip-Flop Energy/Performance Versus Clock Slope and Impact on the Clock Network Design. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

General Strategies to Design Nanometer Flip-Flops in the Energy-Delay Space. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Understanding the Effect of Process Variations on the Delay of Static and Domino Logic. - Massimo Alioto; Gaetano Palumbo; Melita Pennisi (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Inverter transfer curves and SRAM noise margin evaluation based on an ultra-compact MOS model. - Elio Consoli; Gianluca Giustolisi; Gaetano Palumbo (ECCTD, 2011)

An ultra-compact MOS model in nanometer technologies. - Elio Consoli; Gianluca Giustolisi; Gaetano Palumbo (ECCTD, 2011)

Figures of merit for class AB input stages. - Gaetano Palumbo; Melita Pennisi; Ramón González Carvajal (ECCTD, 2011)

DET FF topologies: A detailed investigation in the energy-delay-area domain. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (ISCAS, 2011)

TG Master-Slave FFs: High-speed optimization. - Elio Consoli; Gaetano Palumbo; Melita Pennisi (ISCAS, 2011)

Verilog-A modeling of SPAD statistical phenomena. - Gianluca Giustolisi; Rosario Mita; Gaetano Palumbo (ISCAS, 2011)

Self-biased dual-path push-pull output buffer amplifier topology for LCD driver applications. - Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ISCAS, 2011)

Optimized design of parallel carry-select adders. - Massimo Alioto; Gaetano Palumbo; Massimo Poli (Integr., 2011)

Analysis and Comparison in the Energy-Delay-Area Domain of Nanometer CMOS Flip-Flops: Part I - Methodology and Design Strategies. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2011)

Analysis and Comparison in the Energy-Delay-Area Domain of Nanometer CMOS Flip-Flops: Part II - Results and Figures of Merit. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2011)

A simple keeper topology to reduce delay variations in nanometer domino logic. - Massimo Alioto; Gaetano Palumbo; Melita Pennisi (ISCAS, 2012)

Logic gates dynamic modeling by means of an ultra-compact MOS model. - Elio Consoli; Gianluca Giustolisi; Gaetano Palumbo (ISCAS, 2012)

Conditional push-pull pulsed latches with 726fJ·ps energy-delay product in 65nm CMOS. - Elio Consoli; Massimo Alioto; Gaetano Palumbo; Jan M. Rabaey (ISSCC, 2012)

From energy-delay metrics to constraints on the design of digital circuits. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2012)

Behavioral modeling of statistical phenomena of single-photon avalanche diodes. - Gianluca Giustolisi; Rosario Mita; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2012)

An Accurate Ultra-Compact I-V Model for Nanometer MOS Transistors With Applications on Digital Circuits. - Elio Consoli; Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Robust Miller Compensation With Current Amplifiers Applied to LDO Voltage Regulators. - Gianluca Giustolisi; Gaetano Palumbo; Ester Spitale (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

A Simple Circuit Approach to Reduce Delay Variations in Domino Logic Gates. - Gaetano Palumbo; Melita Pennisi; Massimo Alioto (IEEE Trans. Circuits Syst. I Regul. Pap., 2012)

Reconsidering High-Speed Design Criteria for Transmission-Gate-Based Master-Slave Flip-Flops. - Elio Consoli; Gaetano Palumbo; Melita Pennisi (IEEE Trans. Very Large Scale Integr. Syst., 2012)

A simple extraction procedure for determining the electrical parameters in Silicon Photomultipliers. - Gianluca Giustolisi; Gaetano Palumbo; Paolo Finocchiaro; Alfio Pappalardo (ECCTD, 2013)

Optimized frequency compensation topology for low-power three-stage OTAs. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (ECCTD, 2013)

CMOS class-AB tunable voltage-feedback current operational amplifier. - Fermin Esparza-Alfaro; Antonio J. López-Martín; Gaetano Palumbo; Salvatore Permisi (ICECS, 2014)

Monolithic quenching-and-reset circuit for single-photon avalanche diodes. - Gianluca Giustolisi; Alfio Dario Grasso; Gaetano Palumbo (ICECS, 2014)

High-performance frequency compensation topology for four-stage OTAs. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi; Giuseppe Di Cataldo (ICECS, 2014)

A new accurate analytical expression for the SiPM transient response to single photons. - Davide Marano; Giovanni Bonanno; Massimiliano Belluso; Sergio Billotta; Alessandro Grillo; S. Garozzo; Giuseppe Romeo; Alfio Dario Grasso; Salvatore Pennisi; Gaetano Palumbo (ICECS, 2014)

Low-Power Class-AB CMOS Voltage Feedback Current Operational Amplifier With Tunable Gain and Bandwidth. - Fermin Esparza-Alfaro; Salvatore Pennisi; Gaetano Palumbo; Antonio J. López-Martín (IEEE Trans. Circuits Syst. II Express Briefs, 2014)

Self-Biased Dual-Path Push-Pull Output Buffer Amplifier for LCD Column Drivers. - Alfio Dario Grasso; Davide Marano; Fermin Esparza-Alfaro; Antonio J. López-Martín; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Novel Class of Energy-Efficient Very High-Speed Conditional Push-Pull Pulsed Latches. - Elio Consoli; Gaetano Palumbo; Jan M. Rabaey; Massimo Alioto (IEEE Trans. Very Large Scale Integr. Syst., 2014)

PVT variations in differential flip-flops: A comparative analysis. - Massimo Alioto; Gaetano Palumbo; Elio Consoli (ECCTD, 2015)

Single-miller all-passive compensation network for three-stage OTAs. - Giuseppe Di Cataldo; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (ECCTD, 2015)

Comparative analysis of the robustness of master-slave flip-flops against variations. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (ICECS, 2015)

195-nW 120-dB subthreshold CMOS OTA driving up to 200 pF and occupying only 4.4-10-3 mm2. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2015)

Variability budgetin pulsed flip-flops. - Massimo Alioto; Gaetano Palumbo; Elio Consoli (NEWCAS, 2015)

A new enhanced PSPICE implementation of the equivalent circuit model of SiPM detectors. - Davide Marano; Giovanni Bonanno; S. Garozzo; Giuseppe Romeo; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (NEWCAS, 2015)

Variations in Nanometer CMOS Flip-Flops: Part II - Energy Variability and Impact of Other Sources of Variations. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Variations in Nanometer CMOS Flip-Flops: Part I - Impact of Process Variations on Timing. - Massimo Alioto; Elio Consoli; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Three-Stage Dynamic-Biased CMOS Amplifier With a Robust Optimization of the Settling Time. - Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Design Methodology of Subthreshold Three-Stage CMOS OTAs Suitable for Ultra-Low-Power Low-Area and High Driving Capability. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

High-Performance Four-Stage CMOS OTA Suitable for Large Capacitive Loads. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2015)

Integrated Quenching-and-Reset Circuit for Single-Photon Avalanche Diodes. - Gianluca Giustolisi; Alfio Dario Grasso; Gaetano Palumbo (IEEE Trans. Instrum. Meas., 2015)

A 0.003-mm2 50-mW three-stage amplifier driving 10-nF with 2.7-MHz GBW. - Davide Marano; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (ICECS, 2016)

Verilog-a modeling of Silicon Photo-Multipliers. - Gianluca Giustolisi; Gaetano Palumbo; Paolo Finocchiaro; Alfio Pappalardo (ISCAS, 2016)

Optimized Active Single-Miller Capacitor Compensation With Inner Half-Feedforward Stage for Very High-Load Three-Stage OTAs. - Davide Marano; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. I Regul. Pap., 2016)

Robust design of CMOS amplifiers oriented to settling-time specification. - Gianluca Giustolisi; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2017)

The noise performance of CMOS Miller operational transconductance amplifiers with embedded current-buffer frequency compensation. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi; Willy Sansen (Int. J. Circuit Theory Appl., 2017)

Design of Low-Voltage High-Speed CML D-Latches in Nanometer CMOS Technologies. - Giuseppe Scotti; Davide Bellizia; Alessandro Trifiletti; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2017)

A Clock Boosted Charge Pump with Reduced Rise Time. - Andrea Ballo; Gianluca Giustolisi; Alfio Dario Grasso; Gaetano Palumbo (ICECS, 2018)

Design of CMOS OTAs with Settling-Time Constraints. - Gianluca Giustolisi; Gaetano Palumbo (ICECS, 2018)

A Novel 0.6V MCML D-Latch Topology exploiting Dynamic Body Bias Threshold Lowering. - Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (ICECS, 2018)

Three-stage single-miller CMOS OTA driving 10 nF with 1.46-MHz GBW. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi; Davide Marano (ICICDT, 2018)

Non-Inverting Class-AB CMOS Output Stage for Driving High-Capacitive Loads. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS, 2018)

Settling-time oriented OTA design through the approximation of the ideal delay. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS, 2018)

A Novel Very Low Voltage Topology to implement MCML XOR Gates. - Davide Bellizia; Gaetano Palumbo; Giuseppe Scotti; Alessandro Trifiletti (PRIME, 2018)

Bessel-like compensation of three-stage operational transconductance amplifiers. - Gianluca Giustolisi; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2018)

Guest Editorial Special Issue on Selected Papers from PRIME 2017 and SMACD 2017. - Giulia Di Capua; Nuno Horta; Francisco V. Fernández 001; Günhan Dündar; Salvatore Pennisi; Gaetano Palumbo; Massimo Alioto; Gianluca Giustolisi (Integr., 2018)

High-Performance Three-Stage Single-Miller CMOS OTA With No Upper Limit of CL. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Switched-Capacitor Power Management Integrated Circuit for Autonomous Internet of Things Node. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Dual Push-Pull High-Speed Rail-to-Rail CMOS Buffer Amplifier for Flat-Panel Displays. - Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2018)

Class-AB CMOS output stages suitable for low-voltage amplifiers in nanometer technologies. - Gianluca Giustolisi; Gaetano Palumbo; Salvatore Pennisi (Microelectron. J., 2019)

Optimized Charge Pump With Clock Booster for Reduced Rise Time or Silicon Area. - Andrea Ballo; Alfio Dario Grasso; Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2019)

In-Depth Analysis of Pole-Zero Compensations in CMOS Operational Transconductance Amplifiers. - Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2019)

A Subthreshold Cross-Coupled Hybrid Charge Pump for 50-mV Cold-Start. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Access, 2020)

A simple and effective design strategy to increase power conversion efficiency of linear charge pumps. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2020)

Current-mode body-biased switch to increase performance of linear charge pumps. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (Int. J. Circuit Theory Appl., 2020)

Linear distribution of capacitance in Dickson charge pumps to reduce rise time. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo; Toru Tanzawa (Int. J. Circuit Theory Appl., 2020)

Delay models and design guidelines for MCML gates with resistor or PMOS load. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (Microelectron. J., 2020)

A High-Performance Charge Pump Topology for Very-Low-Voltage Applications. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

Charge Pump Improvement for Energy Harvesting Applications by Node Pre-Charging. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Trans. Circuits Syst., 2020)

A Multi-Folded MCML for Ultra-Low-Voltage High-Performance in Deeply Scaled CMOS. - Gaetano Palumbo; Giuseppe Scotti (IEEE Trans. Circuits Syst., 2020)

A Novel 0.5 V MCML D-Flip-Flop Topology Exploiting Forward Body Bias Threshold Lowering. - Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

A Low-Voltage High-Performance Frequency Divider exploiting Folded MCML. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (ISCAS, 2021)

Design of Three-Stage OTAs from Settling-Time and Slew-Rate Constraints. - Gianluca Giustolisi; Gaetano Palumbo (ISCAS, 2021)

Comparison of the Wide-Frequency Range Dynamic Behavior of the Dickson and Cockcroft-Walton Voltage Multipliers. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (MWSCAS, 2021)

Dickson Charge Pump: Design Strategy for Optimum Efficiency. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (NEWCAS, 2021)

A Memory-Targeted Dynamic Reconfigurable Charge Pump to Achieve a Power Consumption Reduction in IoT Nodes. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Access, 2021)

Design of CMOS three-stage amplifiers for near-to-minimum settling-time. - Gianluca Giustolisi; Gaetano Palumbo (Microelectron. J., 2021)

Design of Low-Voltage Power Efficient Frequency Dividers in Folded MOS Current Mode Logic. - Francesco Centurelli; Giuseppe Scotti; Alessandro Trifiletti; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Design of Three-Stage OTA Based on Settling-Time Requirements Including Large and Small Signal Behavior. - Gianluca Giustolisi; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2021)

Charge Pumps for Ultra-Low-Power Applications: Analysis, Design, and New Solutions. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo; Toru Tanzawa (IEEE Trans. Circuits Syst. II Express Briefs, 2021)

A Very-Low-Voltage Frequency Divider in Folded MOS Current Mode Logic With Complementary n- and p-type Flip-Flops. - Francesco Centurelli; Giuseppe Scotti; Gaetano Palumbo (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A Methodology to Derive a Symbolic Transfer Function for Multistage Amplifiers. - Hamed Aminzadeh; Alfio Dario Grasso; Gaetano Palumbo (IEEE Access, 2022)

A Charge Loss Aware Advanced Model of Dickson Voltage Multipliers. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo; Toru Tanzawa (IEEE Access, 2022)

A Novel Clock Gating Approach for the Design of Low-Power Linear Feedback Shift Registers. - Gianluca Giustolisi; Rosario Mita; Gaetano Palumbo; Giuseppe Scotti (IEEE Access, 2022)

Analysis and Comparison in the Energy-Delay Space of Nanometer CMOS One-Bit Full-Adders. - Gianluca Giustolisi; Gaetano Palumbo (IEEE Access, 2022)

Double-Differential Amplifier for sEMG Measurement by Means of a Current-Mode Approach. - Federico Nicolas Guerrero; Enrique Mario Spinelli; Alfio Dario Grasso; Gaetano Palumbo (IEEE Access, 2022)

Single miller capacitor frequency compensation techniques: Theoretical comparison and critical review. - Alfio Dario Grasso; Davide Marano; Gaetano Palumbo; Salvatore Pennisi (Int. J. Circuit Theory Appl., 2022)

The Dickson Charge Pump as a Signal Amplifier. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

A Bulk Current Regulation Technique for Dual-Branch Cross-Coupled Charge Pumps. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Two-Stage OTA With All Subthreshold MOSFETs and Optimum GBW to DC-Current Ratio. - Javier Beloso-Legarra; Alfio Dario Grasso; Antonio J. López-Martín; Gaetano Palumbo; Salvatore Pennisi (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

GBW Optimization in Two-Stage OTAs Operating in Weak Inversion. - Javier Beloso-Legarra; Antonio Lopez-Martin; Carlos Aristoteles De la Cruz; Alfio Dario Grasso; Gaetano Palumbo; Salvatore Pennisi (DCIS, 2023)

Fully On-Chip Charge Pump-based Boost Converter in 65-nm CMOS for Single Solar Cell Powered IC. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (ISCAS, 2023)

Triple Clock Boosted Voltage Multiplier: A Design Strategy to Heavily Reduce Rise Time. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (NEWCAS, 2023)

An Energy-Efficient Design Strategy for Dickson Charge Pumps with Linear Distributed Capacitance. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (NEWCAS, 2023)

Very-Low-Voltage Charge Pump Topologies for IoT Applications. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

The Self-Oscillating Dickson Charge Pump. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (DCIS, 2024)

Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications. - Riccardo Della Sala; Francesco Centurelli; Giuseppe Scotti; Gaetano Palumbo (IEEE Access, 2024)

The charge pump as a signal amplifier: enabling small-signal gain boosting. - Andrea Ballo; Alfio Dario Grasso; Gaetano Palumbo (ISCAS, 2025)