Gagan Gupta

Orcid: 0000-0002-8568-2949

According to our database1, Gagan Gupta authored at least 18 papers between 1994 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2022
Calipers: a criticality-aware framework for modeling processor performance.
Proceedings of the ICS '22: 2022 International Conference on Supercomputing, Virtual Event, June 28, 2022

2021
Performance Characterization of .NET Benchmarks.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021

2019
Performance Modeling and Bottleneck Analysis of EDGE Processors Using Dependence Graphs.
IEEE Comput. Archit. Lett., 2019

2017
Kickstarting Semiconductor Innovation with Open Source Hardware.
Computer, 2017

2016
Open-source Hardware: Opportunities and Challenges.
CoRR, 2016

2014
Adaptive, efficient, parallel execution of parallel programs.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2014

Globally precise-restartable execution of parallel programs.
Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation, 2014

Have your cake in parallel and eat it sequentially too! Semantically sequential, parallel execution of multiprocessor programs.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

2013
Joint carrier aggregation and packet scheduling in LTE-advanced networks.
Proceedings of the 10th Annual IEEE International Conference on Sensing, 2013

Enhanced Block Playfair Cipher.
Proceedings of the Quality, Reliability, Security and Robustness in Heterogeneous Networks, 2013

Assessment of ARIMA-based prediction techniques for road-traffic volume.
Proceedings of the Fifth International Conference on Management of Emergent Digital EcoSystems, 2013

Holistic run-time parallelism management for time and energy efficiency.
Proceedings of the International Conference on Supercomputing, 2013

2012
Efficient, precise-restartable program execution on future multicores.
Proceedings of the 2012 IEEE Hot Chips 24 Symposium (HCS), 2012

2011
Poster: enabling massive parallelism for stochastic optimization.
Proceedings of the Conference on High Performance Computing Networking, Storage and Analysis, 2011

Dataflow execution of sequential imperative programs on multicore architectures.
Proceedings of the 44rd Annual IEEE/ACM International Symposium on Microarchitecture, 2011

2010
Simulating Large Scale Parallel Applications Using Statistical Models for Sequential Execution Blocks.
Proceedings of the 16th IEEE International Conference on Parallel and Distributed Systems, 2010

1995
Architectures for hierarchical and other block matching algorithms.
IEEE Trans. Circuits Syst. Video Technol., 1995

1994
VLSI Architectures for Hierarchical Block Matching.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994


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