Integrated MAC-based Systolic Arrays: Design and Performance Evaluation. - Dantu Nandini Devi; Gandi Ajay Kumar; Bindu G. Gowda; Madhav Rao (ACM Great Lakes Symposium on VLSI, 2024)

FPGA-based Hardware Software Co-design to Accelerate Brain Tumour Segmentation. - Vinay Rayapati; Gogireddy Ravi Kiran Reddy; Gandi Ajay Kumar; Saketh Gajawada; Sanampudi Gopala Krishna Reddy; Nanditha Rao (ISCAS, 2024)

Performance-Aware Design of Approximate Integrated MAC Factored Systolic Array Accelerators. - Dantu Nandini Devi; Gandi Ajay Kumar; Bindu G. Gowda; Madhav Rao (ISQED, 2024)

PSO Optimized Design of Error Balanced Weight Stationary Systolic Array Architecture for CNN. - Dantu Nandini Devi; Gandi Ajay Kumar; Bindu G. Gowda; Madhav Rao (ISQED, 2024)

OEDASA: Optimization Enabled Error-Diluted Approximate Systolic Array Design for an Image Processing Application. - Dantu Nandini Devi; Gandi Ajay Kumar; Bindu G. Gowda; Madhav Rao (VLSID, 2024)

EBACA: Efficient Bfloat16-based Activation Function Implementation Using Enhanced CORDIC Architecture. - Vinay Rayapati; Sanampudi Gopala Krishna Reddy; Gandi Ajay Kumar; Gogireddy Ravi Kiran Reddy; Madhav Rao (VLSID, 2024)