Increasing the number of effective registers in a low-power processor using a windowed register file. - Rajiv A. Ravindran; Robert M. Senger; Eric D. Marsman; Ganesh S. Dasika; Matthew R. Guthaus; Scott A. Mahlke; Richard B. Brown (CASES, 2003)

Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache. - Rajiv A. Ravindran; Pracheeti D. Nagarkar; Ganesh S. Dasika; Eric D. Marsman; Robert M. Senger; Scott A. Mahlke; Richard B. Brown (CGO, 2005)

Partitioning Variables across Register Windows to Reduce Spill Code in a Low-Power Processor. - Rajiv A. Ravindran; Robert M. Senger; Eric D. Marsman; Ganesh S. Dasika; Matthew R. Guthaus; Scott A. Mahlke; Richard B. Brown (IEEE Trans. Computers, 2005)

DVFS in loop accelerators using BLADES. - Ganesh S. Dasika; Shidhartha Das; Kevin Fan; Scott A. Mahlke; David M. Bull (DAC, 2008)

Bridging the computation gap between programmable processors and hardwired accelerators. - Kevin Fan; Manjunath Kudlur; Ganesh S. Dasika; Scott A. Mahlke (HPCA, 2009)

Power-efficient medical image processing using PUMA. - Ganesh S. Dasika; Kevin Fan; Scott A. Mahlke (SASP, 2009)

MEDICS: ultra-portable processing for medical image reconstruction. - Ganesh S. Dasika; Ankit Sethia; Vincentius Robby; Trevor N. Mudge; Scott A. Mahlke (PACT, 2010)

CoreGenesis: erasing core boundaries for robust and configurable performance. - Shantanu Gupta; Shuguang Feng; Amin Ansari; Ganesh S. Dasika; Scott A. Mahlke (PACT, 2010)

Mighty-morphing power-SIMD. - Ganesh S. Dasika; Mark Woh; Sangwon Seo; Nathan Clark; Trevor N. Mudge; Scott A. Mahlke (CASES, 2010)

A power-efficient 32b ARM ISA processor using timing-error detection and correction for transient-error tolerance and adaptation to PVT variation. - David M. Bull; Shidhartha Das; Karthik Shivashankar; Ganesh S. Dasika; Krisztián Flautner; David T. Blaauw (ISSCC, 2010)

PEPSC: A Power-Efficient Processor for Scientific Computing. - Ganesh S. Dasika; Ankit Sethia; Trevor N. Mudge; Scott A. Mahlke (PACT, 2011)

A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation. - David M. Bull; Shidhartha Das; Karthik Shivashankar; Ganesh S. Dasika; Krisztián Flautner; David T. Blaauw (IEEE J. Solid State Circuits, 2011)

Correction to "A Power-Efficient 32 bit ARM Processor Using Timing-Error Detection and Correction for Transient-Error Tolerance and Adaptation to PVT Variation". - David M. Bull; Shidhartha Das; Karthik Shivashankar; Ganesh S. Dasika; Krisztián Flautner; David T. Blaauw (IEEE J. Solid State Circuits, 2011)

Power-Efficient Accelerators for High-Performance Applications. - Ganesh S. Dasika (2011)

A Customized Processor for Energy Efficient Scientific Computing. - Ankit Sethia; Ganesh S. Dasika; Trevor N. Mudge; Scott A. Mahlke (IEEE Trans. Computers, 2012)

APOGEE: Adaptive prefetching on GPUs for energy efficiency. - Ankit Sethia; Ganesh S. Dasika; Mehrzad Samadi; Scott A. Mahlke (PACT, 2013)

A 1GHz hardware loop-accelerator with razor-based dynamic adaptation for energy-efficient operation. - Shidhartha Das; Ganesh S. Dasika; Karthik Shivashankar; David M. Bull (CICC, 2013)

A 1 GHz Hardware Loop-Accelerator With Razor-Based Dynamic Adaptation for Energy-Efficient Operation. - Shidhartha Das; Ganesh S. Dasika; Karthik Shivashankar; David M. Bull (IEEE Trans. Circuits Syst. I Regul. Pap., 2014)

Scalpel: Customizing DNN Pruning to the Underlying Hardware Parallelism. - Jiecao Yu; Andrew Lukefahr; David J. Palframan; Ganesh S. Dasika; Reetuparna Das; Scott A. Mahlke (ISCA, 2017)

A Deep Dive Into Understanding The Random Walk-Based Temporal Graph Learning. - Nishil Talati; Di Jin 003; Haojie Ye; Ajay Brahmakshatriya; Ganesh S. Dasika; Saman P. Amarasinghe; Trevor N. Mudge; Danai Koutra; Ronald G. Dreslinski (IISWC, 2021)