Design of threshold dominant delay Physical Unclonable Functions in 65nm CMOS. - Yuejun Zhang; Pengjun Wang; Jianrui Li; Gang Li 038 (ISIC, 2014)

Design of power-up and arbiter hybrid physical unclonable functions in 65nm CMOS. - Yuejun Zhang; Pengjun Wang; Gang Li 038; Haoyu Qian; Xiaomin Zheng (ASICON, 2015)

Design of ternary pulsed reversible counter based on CNFET. - Yaopeng Kang; Pengjun Wang; Yuejun Zhang; Gang Li 038 (ASICON, 2017)

A highly reliable lightweight PUF circuit with temperature and voltage compensated for secure chip identification. - Gang Li 038; Pengjun Wang; Yuejun Zhang (ASICON, 2017)

A multi-port low-power current mode PUF using MOSFET current-division deviation in 65 nm technology. - Gang Li 038; Pengjun Wang; Yuejun Zhang; Huihong Zhang (Microelectron. J., 2017)

High performance bistable weak physical unclonable function for IoT security. - Gang Li 038; Pengjun Wang; Huihong Zhang (IEICE Electron. Express, 2018)

An Obfuscated Challenge Design for APUF to Resist Machine Learning Attacks. - Bo Chen; Pengjun Wang; Gang Li 038 (ASICON, 2019)

A 215-F² Bistable Physically Unclonable Function With an ACF of <0.005 and a Native Bit Instability of 2.05% in 65-nm CMOS Process. - Gang Li 038; Pengjun Wang; Xuejiao Ma; Jiana Lian; Junpeng Shu; Yuejun Zhang (IEEE Trans. Very Large Scale Integr. Syst., 2020)

Matrix Encryption based Anti-Machine Learning Attack Algorithm for Strong PUF. - Ziyu Zhou; Gang Li 038; Pengjun Wang; Ming Ye (ASICON, 2021)

A 0.004% resolution & SAT. - Yuejun Zhang; Haiming Zhang; Pengjun Wang; Qiufeng Wu; Gang Li 038 (Integr., 2021)

A Multimode Configurable Physically Unclonable Function With Bit-Instability-Screening and Power-Gating Strategies. - Gang Li 038; Pengjun Wang; Xuejiao Ma; Yijian Shi; Bo Chen; Yuejun Zhang (IEEE Trans. Very Large Scale Integr. Syst., 2021)

A Novel Machine Learning Attack Resistant APUF with Dual-Edge Acquisition. - Hui Li; Gang Li 038; Pengjun Wang; Xilong Shao (AsianHOST, 2022)

A compact weak PUF circuit based on MOSFET subthreshold leakage current. - Yuanfeng Xie; Gang Li 038; Pengjun Wang; Ziyu Zhou (IEICE Electron. Express, 2022)

A Compact Weak PUF Circuit Based on Random Process Deviations of Amplifier Chain. - Pengjun Wang; Yuanfeng Xie; Gang Li 038 (AsianHOST, 2023)

Design of PUF Circuit Based on Charge Leakage of Cascade Dynamic Gate. - Xudong Wu; Gang Li 038; Pengjun Wang (ASICON, 2023)

A highly stable XOR APUF based on deviation signal screening mechanism. - Guanbao Zhai; Pengjun Wang; Gang Li 038; Youyi Zhuang (IEICE Electron. Express, 2023)

A greedy algorithm based Compensation Circuit for Optimizing the Output Statistics of APUF. - Jiana Lian; Pengjun Wang; Gang Li 038 (Microelectron. J., 2023)

A challenge-screening strategy for enhancing the stability of strong PUF based on machine learning. - Ziyu Zhou; Gang Li 038; Pengjun Wang (Microelectron. J., 2023)

PI PUF: A Processor-Intrinsic PUF for IoT. - Li Ni; Pengjun Wang; Yuejun Zhang; Gang Li 038; Lin Ding; Jiliang Zhang 002 (Comput. Electr. Eng., 2023)

Design of a Novel Self-Test-on-Chip Interface ASIC for Capacitive Accelerometers. - Xiangyu Li 011; Pengjun Wang; Gang Li 038; Yuejun Zhang (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Machine learning attacks resistant strong PUF design utilizing response obfuscates challenge with lower hardware overhead. - Xuejiao Ma; Pengjun Wang; Gang Li 038; Ziyu Zhou (Microelectron. J., 2023)

Timing-violation-soft PUF design based on carry-lookahead adder. - Pengjun Wang; Ziyang Zheng; Gang Li 038 (ITC-Asia, 2024)

PN-APUF: A MOSFET threshold loss based strong arbiter PUF with double-edge sampling. - Xilong Shao; Xuejiao Ma; Gang Li 038; Pengjun Wang; Hui Li (IEICE Electron. Express, 2024)

Anti-machine-learning-attack strong PUF design based on multi-path delay selection strategy. - Gang Li 038; Xilong Shao; Pengjun Wang; Xuejiao Ma; Hui Li; Hao Ye (Microelectron. J., 2024)

Bagua Protocol: A Whole-Process Configurable Protocol for IoT Sensing Devices Security Based on Strong PUF. - Ziyu Zhou; Pengjun Wang; Gang Li 038 (IEEE Internet Things J., 2024)

SI PUF: An SRAM and Inverter-Based PUF With a Bit Error Rate of 0.0053% and 0.073/0.042 pJ/bit. - Li Ni; Pengjun Wang; Yuejun Zhang; Xiangyu Li 011; Gang Li 038; Lin Ding; Jiliang Zhang 002 (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

Design of PUF circuits based on parallel delay arbitration. - Xiaolong Yu; Pengjun Wang; Gang Li 038; Dong Lu (IEICE Electron. Express, 2025)

Synchronous state judgment arbiter PUF circuit design based on FPGA. - Junyang Chen; Ziyu Zhou; Pengjun Wang; Gang Li 038 (Microelectron. J., 2025)

A 578-TOPS/W RRAM-Based Binary Convolutional Neural Network Macro for Tiny AI Edge Devices. - Lixun Wang; Yuejun Zhang; Pengjun Wang; Jianguo Yang; Huihong Zhang; Gang Li 038; Qikang Li (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A Pay-Per-ISE RISC-V Processor With Hardware-Assisted Orthogonal Obfuscation. - Yuejun Zhang; Lixun Wang; Jiawei Wang; Yongzhong Wen; Huihong Zhang; Gang Li 038; Pengjun Wang (IEEE Trans. Very Large Scale Integr. Syst., 2025)

A Strong PUF-Based Security Protocol to Protect AI Model Parameters Against Privacy Information Leakage. - Ziyu Zhou; Gang Li 038; Yuejun Zhang; Ziyang Zheng; Tengfei Yuan; Pengjun Wang (IEEE Internet Things J., 2025)

Improving the Stability of APUF to 100% Without Extra Hardware Overhead for Enhancing the Performance of Security Authentication Protocols. - Ziyu Zhou; Pengjun Wang; Gang Li 038; Shuang Hu; Yuejun Zhang (IEEE Internet Things J., 2025)