Asynchronous circuit placement by lagrangian relaxation. - Gang Wu 002; Tao Lin 007; Hsin-Ho Huang; Chris Chu; Peter A. Beerel (ICCAD, 2014)

Gate Sizing and Vth Assignment for Asynchronous Circuits Using Lagrangian Relaxation. - Gang Wu 002; Ankur Sharma 001; Chris C. N. Chu (ASYNC, 2015)

POLAR 3.0: An Ultrafast Global Placement Engine. - Tao Lin 007; Chris C. N. Chu; Gang Wu 002 (ICCAD, 2015)

Flip-flop clustering by weighted K-means algorithm. - Gang Wu 002; Yue Xu; Dean Wu; Manoj Ragupathy; Yu-Yen Mo; Chris C. N. Chu (DAC, 2016)

Simultaneous slack matching, gate sizing and repeater insertion for asynchronous circuits. - Gang Wu 002; Chris C. N. Chu (DATE, 2016)

Detailed Placement Algorithm for VLSI Design With Double-Row Height Standard Cells. - Gang Wu 002; Chris Chu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2016)

A Fast Incremental Cycle Ratio Algorithm. - Gang Wu 002; Chris Chu (ISPD, 2017)

Two Approaches for Timing-Driven Placement by Lagrangian Relaxation. - Gang Wu 002; Chris Chu (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2017)