A Cryo-CMOS 4-5.9-GHz Fractional-N Cascaded PLL Achieving 36.9-fsrms Integrated Jitter and -69.1-dBc Fractional Spur. - Wenqiang Huang; Xuanyan Liu; Gangxu Gu; Tiefu Li; Wensong Wang; Yuanjin Zheng; Zhihua Wang 001; Yanshu Guo; Hanjun Jiang (IEEE Trans. Very Large Scale Integr. Syst., 2026)