On the Implementation of Virtual Array Using Configuration Plane. - Yongsheng Yin; Li Li 003; Minglun Gao; Gaoming Du; Yu-Kun Song (APPT, 2007)

Design and performance evaluation of a 2D-mesh Network on Chip prototype using FPGA. - Luofeng Geng; Gaoming Du; Duoli Zhang; Minglun Gao; Ning Hou; Yu-Kun Song (APCCAS, 2008)

A technique of automatic monitor generation based on FSM. - Duoli Zhang; Yu-Kun Song; Gaoming Du; Yuanjie Zhai (APCCAS, 2008)

Study on the Multi-pipeline Reconfigurable Computing System. - Yong-Sheng Yin; Gaoming Du; Yu-Kun Song (CSSE (4), 2008)

Scalability Study on Mesh Based Network on Chip. - Gaoming Du; Duoli Zhang; Yu-Kun Song; Minglun Gao; Luofeng Geng; Ning Hou (PACIIA (2), 2008)

VLSI Architecture of Video Post-Processing System for MPEG/H.26X. - Chun-Ping Qin; Duoli Zhang; Gaoming Du; Minglun Gao; Yu-Kun Song (NCM, 2009)

Application-level pipelining on Hierarchical NoC. - Wei Yi; Hongbing Pan; Peng Pan; Li Li 003; Minglun Gao; Ning Hou; Gaoming Du; Duoli Zhang (ISCAS, 2010)

Worst-case performance analysis of 2-D mesh NoCs using multi-path minimal routing. - Gaoming Du; Cunqiang Zhang; Zhonghai Lu; Alberto Saggio; Minglun Gao (CODES+ISSS, 2012)

An analytical model for worst-case reorder buffer size of multi-path minimal routing NoCs. - Gaoming Du; Miao Li; Zhonghai Lu; Minglun Gao; Chunhua Wang (NOCS, 2014)

Validating Delay Bounds in Networks on Chip: Tightness and Pitfalls. - Alberto Saggio; Gaoming Du; Xueqian Zhao; Zhonghai Lu (ISVLSI, 2015)

OLITS: An Ohm's Law-like traffic splitting model based on congestion prediction. - Gaoming Du; Yanghao Ou; Xiangyang Li; Ping Song; Zhonghai Lu; Minglun Gao (DATE, 2016)

AFTER: Asynchronous Fault-Tolerant Router Design in Network-on-Chip. - Yiming Ouyang; Qi Chen; Xiumin Wang; Xiaoye Ouyang; Huaguo Liang; Gaoming Du (J. Circuits Syst. Comput., 2016)

SSS: self-aware system-on-chip using static-dynamic hybrid method (work-in-progress). - Gaoming Du; Shibi Ma; Zhenmin Li; Zhonghai Lu; Yiming Ouyang; Minglun Gao (CASES, 2017)

On the Accuracy of Stochastic Delay Bound for Network on Chip. - Gaoming Du; Yongliang Zhang; Zhenmin Li; Guanyu Liu; Duoli Zhang; Yiming Ouyang (NOCS, 2017)

A TSV Fault-Tolerant Scheme Based on Failure Classification in 3D-NoC. - Yiming Ouyang; Jian Da; Xiumin Wang; Qianqian Han; Huaguo Liang; Gaoming Du (J. Circuits Syst. Comput., 2017)

Efficient Softmax Hardware Architecture for Deep Neural Networks. - Gaoming Du; Chao Tian; Zhenmin Li; Duoli Zhang; Yongsheng Yin; Yiming Ouyang (ACM Great Lakes Symposium on VLSI, 2019)

NR-MPA: Non-Recovery Compression Based Multi-Path Packet-Connected-Circuit Architecture of Convolution Neural Networks Accelerator. - Gaoming Du; Zhenwen Yang; Zhenmin Li; Duoli Zhang; Yongsheng Yin; Zhonghai Lu (ICCD, 2019)

CPCA: An efficient wireless routing algorithm in WiNoC for cross path congestion awareness. - Yiming Ouyang; Zhe Li; Jianhua Li 003; Chenglong Sun; Huaguo Liang; Gaoming Du (Integr., 2019)

SSS: Self-aware System-on-chip Using a Static-dynamic Hybrid Method. - Gaoming Du; Guanyu Liu; Zhenmin Li; Yifan Cao; Duoli Zhang; Yiming Ouyang; Minglun Gao; Zhonghai Lu (ACM J. Emerg. Technol. Comput. Syst., 2019)

Design of a Wireless Router with Virtual Channel Fault Tolerant in WiNoC. - Yiming Ouyang; Wu Zhou; Sheng Li; Zhilu Wang; Huaguo Liang; Gaoming Du (J. Circuits Syst. Comput., 2020)

A low-latency DMM-1 encoder for 3D-HEVC. - Gaoming Du; Yifan Cao; Zhenmin Li; Duoli Zhang; Li Wang; Yu-Kun Song; Yiming Ouyang (J. Real Time Image Process., 2020)

Optimization of Node-clustering-based DAG partition targeting NVDLA Architecture. - Shijie Hu; Gaoming Du; Jiashen Li; Zhenmin Li; Wei Ni; Yongsheng Yin; Xiaolei Wang (ASICON, 2021)

A Real-Time Effective Fusion-Based Image Defogging Architecture on FPGA. - Gaoming Du; Jiting Wu; Hongfang Cao; Kun Xing; Zhenmin Li; Duoli Zhang; Xiaolei Wang (ACM Trans. Multim. Comput. Commun. Appl., 2021)

RB-OLITS: A Worst Case Reorder Buffer Size Reduction Approach for 3-D-NoC. - Zhenmin Li; Yuqing Ma; Gaoming Du; Xiaolei Wang; Yukun Song; Duoli Zhang (IEEE Des. Test, 2022)

A BNN Accelerator Based on Edge-skip-calculation Strategy and Consolidation Compressed Tree. - Gaoming Du; Bangyi Chen; Zhenmin Li; Zhenxing Tu; Junjie Zhou; Shenya Wang; Qinghao Zhao; Yongsheng Yin; Xiaolei Wang (ACM Trans. Reconfigurable Technol. Syst., 2022)

An Area-Efficient Large Integer NTT-Multiplier Using Discrete Twiddle Factor Approach. - Zhenmin Li; Jingwei Ren; Gaoming Du; Zhenxing Tu; Xiaolei Wang; Yongsheng Yin; Yiming Ouyang (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A Low-Latency Polynomial Multiplier Accelerator for CRYSTALS-Dilithium Digital Signature. - Gaoming Du; Zhuo Chen; Zhenmin Li; Xiaolei Wang; Duoli Zhang (ACM Great Lakes Symposium on VLSI, 2024)

A fast hardware accelerator for nighttime fog removal based on image fusion. - Tianyi Lv; Gaoming Du; Zhenmin Li; Xiaolei Wang; Peiyi Teng; Wei Ni; Yiming Ouyang (Integr., 2024)

An Efficient Ring Polynomial Multiplication Accelerator for Homomorphic Encryption. - Jingwei Ren; Gaoming Du; Zhenmin Li; Xianhu Jia; Qiuzhu Liao; Xiaolei Wang; Duoli Zhang (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

High-speed hardware accelerator based on brightness improved by Light-DehazeNet. - Peiyi Teng; Gaoming Du; Zhenmin Li; Xiaolei Wang; Yongsheng Yin (J. Real Time Image Process., 2024)

An energy-efficient dehazing neural network accelerator based on E2AOD-Net. - Zhihao Zhang; Gaoming Du; Zhenmin Li; Qinran Kang; Wenyao Zhao; Xiaolei Wang (J. Real Time Image Process., 2024)

Image encryption/decryption accelerator based on Fast Cosine Number Transform. - Zhiqiang Xu; Zhenmin Li; Feng Han; Xiaolei Wang; Gaoming Du (Integr., 2025)

An efficient dehazing accelerator by fusing dark channel prior and guided filter. - Tianyi Lv; Wei Mao; Zhenmin Li; Gaoming Du; Xiaolei Wang; Wei Ni; Duoli Zhang (Microelectron. J., 2025)

A high-speed hardware accelerator for lightweight dehazing neural network based on SFA-Net. - Zhe Chen; Gaoming Du; Zhenmin Li; Xiaolei Wang; Yongsheng Yin (J. Real Time Image Process., 2025)