A DOE-ILP assisted conjugate-gradient based power and stability optimization in High-K Nano-CMOS SRAM. - Garima Thakral; Saraju P. Mohanty; Dhruva Ghai; Dhiraj K. Pradhan (ACM Great Lakes Symposium on VLSI, 2010)

P3 (power-performance-process) optimization of nano-CMOS SRAMusing statistical DOE-ILP. - Garima Thakral; Saraju P. Mohanty; Dhruva Ghai; Dhiraj K. Pradhan (ISQED, 2010)

A Combined DOE-ILP Based Power and Read Stability Optimization in Nano-CMOS SRAM. - Garima Thakral; Saraju P. Mohanty; Dhruva Ghai; Dhiraj K. Pradhan (VLSI Design, 2010)

DOE-ILP Based Simultaneous Power and Read Stability Optimization in Nano-CMOS SRAM. - Garima Thakral; Saraju P. Mohanty; Dhiraj K. Pradhan; Elias Kougianos (J. Low Power Electron., 2010)

Fast analog design optimization using regression-based modeling and genetic algorithm: A nano-CMOS VCO case study. - Dhruva Ghai; Saraju P. Mohanty; Garima Thakral (ISQED, 2013)

Double gate FinFET based mixed-signal design: A VCO case study. - Dhruva Ghai; Saraju P. Mohanty; Garima Thakral (MWSCAS, 2013)

Comparative analysis of double gate FinFET configurations for analog circuit design. - Dhruva Ghai; Saraju P. Mohanty; Garima Thakral (MWSCAS, 2013)

Fast optimization of nano-CMOS voltage-controlled oscillator using polynomial regression and genetic algorithm. - Dhruva Ghai; Saraju P. Mohanty; Garima Thakral (Microelectron. J., 2013)

Variability-aware design of double gate FinFET-based current mirrors. - Dhruva Ghai; Saraju P. Mohanty; Garima Thakral; Oghenekarho Okobiah (ACM Great Lakes Symposium on VLSI, 2014)