The role of two-cycle simulation in the S/390 verification process. - Gary A. Van Huben (IBM J. Res. Dev., 1997)

PLL modeling and verification in a cycle-simulation environment. - Gary A. Van Huben; Timothy G. McNamara; Thomas E. Gilbert (IBM J. Res. Dev., 1999)

Processor subsystem interconnect architecture for a large symmetric multiprocessing system. - Pak-kin Mak; Gary E. Strait; Michael A. Blake; Kevin W. Kark; Vesselina K. Papazova; A. E. (Rick) Seigler; Gary A. Van Huben; Liyong Wang; George C. Wellwood (IBM J. Res. Dev., 2004)

Enabling Large-Scale Pervasive Logic Verification through Multi-Algorithmic Formal Reasoning. - Tilman Glökler; Jason Baumgartner; Devi Shanmugam; A. E. (Rick) Seigler; Gary A. Van Huben; Barinjato Ramanandray; Hari Mony; Paul Roessler (FMCAD, 2006)

Formal Verification of Partial Good Self-Test Fencing Structures. - Adrian E. Seigler; Gary A. Van Huben; Hari Mony (FMCAD, 2007)

High-speed source-synchronous interface for the IBM System z9 processor. - Derrin M. Berger; Jonathan Y. Chen; Frank D. Ferraiolo; Jeffrey A. Magee; Gary A. Van Huben (IBM J. Res. Dev., 2007)

Server-class DDR3 SDRAM memory buffer chip. - Gary A. Van Huben; Kirk D. Lamb; R. Brett Tremaine; B. E. Aleman; S. M. Rubow; S. H. Rider; Warren E. Maule; Michael E. Wazlowski (IBM J. Res. Dev., 2012)