Fast DC Analysis and Its Application to Combinatorial Optimization Problems. - Gaurav Trivedi; Madhav P. Desai; H. Narayanan (VLSI Design, 2006)

Application of Fast DC Analysis to Partitioning Hypergraphs. - Gaurav Trivedi; H. Narayanan (ISCAS, 2007)

Parallelization of DC Analysis through Multiport Decomposition. - Gaurav Trivedi; Madhav P. Desai; H. Narayanan (VLSI Design, 2007)

Application of DC Analyzer to Combinatorial Optimization Problems. - Gaurav Trivedi; Sumit Punglia; H. Narayanan (VLSI Design, 2007)

Supporting collaboration in Wikipedia between language communities. - Ranjitha Gurunath Kulkarni; Gaurav Trivedi; Tushar Suresh; Miaomiao Wen; Zeyu Zheng; Carolyn P. Rosé (ICIC, 2012)

Kapees: A New Tool for Standard Cell Placement. - Sameer Pawanekar; Kalpesh Kapoor; Gaurav Trivedi (VDAT, 2013)

A Security Framework for NoC Using Authenticated Encryption and Session Keys. - Hemangee K. Kapoor; G. Bhoopal Rao; Sharique Arshi; Gaurav Trivedi (Circuits Syst. Signal Process., 2013)

Clinical Text Analysis Using Interactive Natural Language Processing. - Gaurav Trivedi (IUI Companion, 2015)

Applying an Interactive Machine Learning Approach to Statutory Analysis. - Jaromír Savelka; Gaurav Trivedi; Kevin D. Ashley (JURIX, 2015)

Parallel two step random walk algorithm to analyze VLSI power grid networks. - Satyabrata Dash; Vivek Bangera; Vinay B. Y. Kumar; Gaurav Trivedi; Sachin B. Patkar (VDAT, 2015)

TSV aware standard cell placement for 3D ICs. - Sameer Pawanekar; Gaurav Trivedi (VDAT, 2015)

Net weighing based timing driven standard cell placer. - Sameer Pawanekar; Gaurav Trivedi (VDAT, 2015)

Variability-aware parametric yield enhancement via post-silicon tuning of hybrid redundant MAC units. - Sunil Dutt; Anshu Chauhan; Sukumar Nandi; Gaurav Trivedi (VLSI-DAT, 2015)

A High-Performance Energy-Efficient Hybrid Redundant MAC for Error-Resilient Applications. - Sunil Dutt; Anshu Chauhan; Rahul Bhadoriya; Sukumar Nandi; Gaurav Trivedi (VLSID, 2015)

A Nonlinear Analytical Optimization Method for Standard Cell Placement of VLSI Circuits. - Sameer Pawanekar; Gaurav Trivedi; Kalpesh Kapoor (VLSID, 2015)

Applying River Formation Dynamics to Analyze VLSI Power Grid Networks. - Satyabrata Dash; Krishna Lal Baishnab; Gaurav Trivedi (VLSID, 2016)

Exploring Approximate Computing for Yield Improvement via Re-design of Adders for Error-Resilient Applications. - Sunil Dutt; Harsh Patel; Sukumar Nandi; Gaurav Trivedi (VLSID, 2016)

A Novel Capacitorless DRAM Cell Design Using Band-Gap Engineered Junctionless Double-Gate FET. - Dheeraj Kumar Sinha; Amitabh Chatterjee; Vishnuram Abhinav; Gaurav Trivedi; Victor Koldyaev (VLSID, 2016)

A Novel Low Power High Speed BEC for 2GHz Sampling Rate Flash ADC in 45nm Technology. - Sarfraz Hussain; Rajesh Kumar 015; Gaurav Trivedi (iNIS, 2017)

Comparison and Design of Dynamic Comparator in 180nm SCL Technology for Low Power and High Speed Flash ADC. - Sarfraz Hussain; Rajesh Kumar 015; Gaurav Trivedi (iNIS, 2017)

Basic CMOS Gate Design by Mixed-Mode Analysis of Step-Channel TMDG-MOSFET. - Pankaj Kumar; Syed Samsuz Zaman; Manash Pratim Sarma; Ashok Ray; Gaurav Trivedi (iNIS, 2017)

Design and Simulation of SF-FinFET and SD-FinFET and Their Performance in Analog, RF and Digital Applications. - Syed Samsuz Zaman; Pankaj Kumar; Manash Pratim Sarma; Ashok Ray; Gaurav Trivedi (iNIS, 2017)

Approxhash: delay, power and area optimized approximate hash functions for cryptography applications. - Sunil Dutt; Bikram Paul; Anshu Chauhan; Sukumar Nandi; Gaurav Trivedi (SIN, 2017)

Fast FPGA Placement Using Analytical Optimization. - Sameer Pawanekar; Gaurav Trivedi (VDAT, 2017)

Analytical Partitioning: Improvement over FM. - Sameer Pawanekar; Gaurav Trivedi (VDAT, 2017)

FEM Based Device Simulator for High Voltage Devices. - Ashok Ray; Gaurav Kumar; Sushanta Bordoloi; Dheeraj Kumar Sinha; Pratima Agarwal; Gaurav Trivedi (VDAT, 2017)

Markov Chain Model Using Lévy Flight for VLSI Power Grid Analysis. - Sukanta Dey; Satyabrata Dash; Sukumar Nandi; Gaurav Trivedi (VLSID, 2017)

Optimization of 2.4 GHz CMOS Low Noise Amplifier Using Hybrid Particle Swarm Optimization with Lévy Flight. - Deepak Joshi; Satyabrata Dash; Ayush Malhotra; Pulimi Venkata Sai; Rahul Das; Dikshit Sharma; Gaurav Trivedi (VLSID, 2017)

An Interactive Tool for Natural Language Processing on Clinical Text. - Gaurav Trivedi; Phuong Pham; Wendy W. Chapman; Rebecca Hwa; Janyce Wiebe; Harry Hochheiser (CoRR, 2017)

Towards Interactive Natural Language Processing in Clinical Care. - Gaurav Trivedi (ICHI, 2018)

An Interactive NLP Tool for Signout Note Preparation. - Gaurav Trivedi; Robert M. Handzel; Shyam Visweswaran; Wendy W. Chapman; Harry Hochheiser (ICHI, 2018)

PGIREM: Reliability-Constrained IR Drop Minimization and Electromigration Assessment of VLSI Power Grid Networks Using Cooperative Coevolution. - Sukanta Dey; Satyabrata Dash; Sukumar Nandi; Gaurav Trivedi (ISVLSI, 2018)

Accuracy enhancement of equal segment based approximate adders. - Sunil Dutt; Sukumar Nandi; Gaurav Trivedi (IET Comput. Digit. Tech., 2018)

NLPReViz: an interactive tool for natural language processing on clinical text. - Gaurav Trivedi; Phuong Pham; Wendy W. Chapman; Rebecca Hwa; Janyce Wiebe; Harry Hochheiser (J. Am. Medical Informatics Assoc., 2018)

Kapees3: A High-Quality VLSI Placement Tool Using Nesterov's Method for Density Penalty. - Sameer Pawanekar; Kalpesh Kapoor; Gaurav Trivedi (J. Circuits Syst. Comput., 2018)

Minimizing area of VLSI power distribution networks using river formation dynamics. - Satyabrata Dash; Sukanta Dey; Deepak Joshi; Gaurav Trivedi (J. Syst. Inf. Technol., 2018)

Multiobjective analog/RF circuit sizing using an improved brain storm optimization algorithm. - Satyabrata Dash; Deepak Joshi; Gaurav Trivedi (Memetic Comput., 2018)

Analysis and Design of Adders for Approximate Computing. - Sunil Dutt; Sukumar Nandi; Gaurav Trivedi (ACM Trans. Embed. Comput. Syst., 2018)

StormOptimus: A Single Objective Constrained Optimizer Based on Brainstorming Process for VLSI Circuits. - Satyabrata Dash; Deepak Joshi; Sukanta Dey; Meenali Janveja; Gaurav Trivedi (Brain Storm Optimization Algorithms, 2019)

Convergence Analysis of River Formation Dynamics Algorithm. - Satyabrata Dash; Gaurav Trivedi (SMC, 2019)

A Cooperative Co-evolution based Scalable Framework for Solving Large-Scale Global optimization Problems. - Ajeyo Dey; Satyabrata Dash; Likhita Tumati; Saumitra Sharma; Nikhil Megharajani; Meenali Janveja; Ismael Rodríguez 001; Gaurav Trivedi (SMC, 2019)

Current Collapse Reduction Technique Using N-Doped Buffer Layer into the Bulk Region of a Gate Injection Transistor. - Koushik Bharadwaj; Ashok Ray; Sushanta Bordoloi; Gaurav Trivedi (VLSID, 2019)

RiverOpt: A Multiobjective Optimization Framework Based on Modified River Formation Dynamics Heuristic. - Satyabrata Dash; Sukanta Dey; Anish Augustine; Sankar Dhar; Jan Pidanic; Zdenek Nemec; Gaurav Trivedi (VLSID, 2019)

Design and Implementation of Low-Power High-throughput PRNGs for Security Applications. - Bikram Paul; Apratim Khobragade; Soumith Javvaji Sai; Sushree Sila P. Goswami; Sunil Dutt; Gaurav Trivedi (VLSID, 2019)

Interactive NLP in Clinical Care: Identifying Incidental Findings in Radiology Reports. - Gaurav Trivedi; Esmaeel R. Dadashzadeh; Robert M. Handzel; Wendy W. Chapman; Shyam Visweswaran; Harry Hochheiser (Appl. Clin. Inform., 2019)

Identifying incidental findings from radiology reports of trauma patients: An evaluation of automated feature representation methods. - Gaurav Trivedi; Charmgil Hong; Esmaeel R. Dadashzadeh; Robert M. Handzel; Harry Hochheiser; Shyam Visweswaran (Int. J. Medical Informatics, 2019)

Analysis, Modeling and Optimization of Equal Segment Based Approximate Adders. - Sunil Dutt; Satyabrata Dash; Sukumar Nandi; Gaurav Trivedi (IEEE Trans. Computers, 2019)

PowerPlanningDL: Reliability-Aware Framework for On-Chip Power Grid Design using Deep Learning. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (DATE, 2020)

FPGA Implementation of Simplified Spiking Neural Network. - Shikhar Gupta; Arpan Vyas; Gaurav Trivedi (ICECS, 2020)

Theoretical Study and Optimization of Apodized Fiber Bragg Grating for Single and Quasi-distributed Structural Health Monitoring Applications. - Krishna Mohan Dwivedi; Gaurav Trivedi; Sunil K. Khijwania (RADIOELEKTRONIKA, 2020)

Comparative Review of Approximate Multipliers. - Sushree Sila P. Goswami; Bikram Paul; Sunil Dutt; Gaurav Trivedi (RADIOELEKTRONIKA, 2020)

Design of Efficient AES Architecture for Secure ECG Signal Transmission for Low-power IoT Applications. - Meenali Janveja; Bikram Paul; Gaurav Trivedi; Gonella Vijayakanthi; Astha Agrawal; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2020)

Methodology and comparative design of an efficient 4-bit encoder with bubble error corrector for 1-GSPS flash type ADC. - Sarfraz Hussain; Rajesh Kumar 015; Gaurav Trivedi (IET Circuits Devices Syst., 2020)

3D-IC partitioning method based on genetic algorithm. - Naorem Yaipharenba Meitei; Krishna Lal Baishnab; Gaurav Trivedi (IET Circuits Devices Syst., 2020)

Machine Learning Approach for Fast Electromigration Aware Aging Prediction in Incremental Design of Large Scale On-chip Power Grid Network. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (ACM Trans. Design Autom. Electr. Syst., 2020)

PGRDP: Reliability, Delay, and Power-Aware Area Minimization of Large-Scale VLSI Power Grid Network Using Cooperative Coevolution. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (Intelligent Computing Paradigm, 2020)

Machine Learning for VLSI CAD: A Case Study in On-Chip Power Grid Design. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (ISVLSI, 2021)

Design of Low Power VLSI Architecture for Classification of Arrhythmic Beats Using DNN for Wearable Device Applications. - Meenali Janveja; Mayank Tantuway; Ketan Chaudhari; Gaurav Trivedi (NorCAS, 2021)

A Low-Complexity Shifting-Based Conflict-Free Memory-Addressing Architecture for Higher-Radix FFT. - Sumit Agarwal; Shaik Rafi Ahamed; Anup Kumar Gogoi; Gaurav Trivedi (IEEE Access, 2021)

Introspection Into Reliability Aspects in AlGaN/GaN HEMTs With Gate Geometry Modification. - Sushanta Bordoloi; Ashok Ray; Gaurav Trivedi (IEEE Access, 2021)

PGOpt: Multi-objective design space exploration framework for large-Scale on-chip power grid design in VLSI SoC using evolutionary computing technique. - Sukanta Dey; Sukumar Nandi; Gaurav Trivedi (Microprocess. Microsystems, 2021)

An Energy Efficient and Resource Optimal VLSI Architecture for ECG Feature Extraction for Wearable Healthcare Applications. - Meenali Janveja; Rushik Parmar; Gaurav Trivedi; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

Design and Implementation of a Low Power Area Efficient Bfloat16 based CORDIC Processor. - Saras Mani Mishra; Hanumant Singh Shekhawat; Gaurav Trivedi; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

Comparison of Floating-point Representations for the Efficient Implementation of Machine Learning Algorithms. - Saras Mani Mishra; Ankita Tiwari; Hanumant Singh Shekhawat; Prithwijit Guha; Gaurav Trivedi; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

An Area and Power Efficient VLSI Architecture to Detect Obstructive Sleep Apnea for Wearable Devices. - Rushik Parmar; Meenali Janveja; Gaurav Trivedi; Jan Pidanic; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

A Scalable and Adaptive Convolutional Neural Network Accelerator. - Jan Pidanic; Arpan Vyas; Rishav Karki; Prateek Vij; Gaurav Trivedi; Zdenek Nemec (RADIOELEKTRONIKA, 2022)

Design of a Low Power and Area Efficient Bfloat16 based Generalized Systolic Array for DNN Applications. - Ankita Tiwari; Saras Mani Mishra; Prithwijit Guha; Jan Pidanic; Zdenek Nemec; Gaurav Trivedi (RADIOELEKTRONIKA, 2022)

Triple Pendulum Based Nonlinear Chaos Generator and its Applications in Cryptography. - Bikram Paul; Souradip Pal; Abhishek Agrawal; Gaurav Trivedi (IEEE Access, 2022)

A 28-Gbps Radix-16, 512-Point FFT Processor-Based Continuous Streaming OFDM for WiGig. - Sumit Agarwal; Shaik Rafi Ahamed; Anup Kumar Gogoi; Gaurav Trivedi (Circuits Syst. Signal Process., 2022)

Application of hash function for generation of modulation data in RadCom system. - Tomás Krejcí; Tomás Zálabský; Dusan Kopecký; Gaurav Trivedi (Digit. Signal Process., 2022)

A Flux Controlled MOS-Based Optimized High Frequency Meminductor Emulator. - Ananda Y. R.; Gadipelli Sriharsha Satyanarayan; Gaurav Trivedi (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

An Optimized MOS-Based High Frequency Charge-Controlled Memcapacitor Emulator. - Ananda Y. R.; Gadipelli Sriharsha Satyanarayan; Gaurav Trivedi (IEEE J. Emerg. Sel. Topics Circuits Syst., 2022)

An area and power efficient VLSI architecture for ECG feature extraction for wearable IoT healthcare applications. - Meenali Janveja; Gaurav Trivedi (Integr., 2022)

A DNN-Based Low Power ECG Co-Processor Architecture to Classify Cardiac Arrhythmia for Wearable Devices. - Meenali Janveja; Rushik Parmar; Mayank Tantuway; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2022)

Programmable Binary Weighted Time-Domain Vector Matrix Multiplier for In-Memory Computing. - Bipul Boro; Ashvinikumar Dongre; Rushik Parmar; Gaurav Trivedi (APCCAS, 2023)

Load-Data Imputation and Economic Feasibility Analysis of an Academic Institution. - Praveen Tiwari; Shaik Asma; Navadeep Ganesh U; Pinakeswar Mahanta; Gaurav Trivedi (ICECET, 2023)

Binary Synaptic Array for Inference and Training with Built-in RRAM Electroforming Circuit. - Ashvinikumar Dongre; Gaurav Trivedi (ISQED, 2023)

A Novel Dynamic Memristor Window Function for High Frequency Applications. - Ananda Y. R.; Subhashis Das; Gaurav Trivedi (NEWCAS, 2023)

Comparison of Hardware Implementations of Cryptographic Algorithms for IoT Applications. - Sushree Sila P. Goswami; Gaurav Trivedi (RADIOELEKTRONIKA, 2023)

An Adaptive Window Function based Memristor Model. - Ananda Y. R.; Arkadeep Hajra; Gaurav Trivedi (RADIOELEKTRONIKA, 2023)

IndiRA: Design and Implementation of a Pipelined RISC-V Processor. - Ankita Tiwari; Prithwijit Guha; Gaurav Trivedi; Nitesh Gupta; Navneeth Jayaraj; Jan Pidanic (RADIOELEKTRONIKA, 2023)

RRAM-Based Energy Efficient Scalable Integrate and Fire Neuron With Built-In Reset Circuit. - Ashvinikumar Dongre; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

MInSC: A VLSI Architecture for Myocardial Infarction Stages Classifier for Wearable Healthcare Applications. - Meenali Janveja; Rushik Parmar; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

A High Frequency MOS-Based Floating Charge-Controlled Memcapacitor Emulator. - Ananda Y. R.; Gadipelli Sriharsha Satyanarayan; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2023)

Design of DNN-Based Low-Power VLSI Architecture to Classify Atrial Fibrillation for Wearable Devices. - Rushik Parmar; Meenali Janveja; Jan Pidanic; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A MOS-DTMOS Implementation of Floating Memristor Emulator for High-Frequency Applications. - Ananda Y. R.; Nehal Raj; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

A Resource Efficient Software-Hardware Co-Design of Lattice-Based Homomorphic Encryption Scheme on the FPGA. - Bikram Paul; Tarun Kumar Yadav; Balbir Singh; Srinivasan Krishnaswamy; Gaurav Trivedi (IEEE Trans. Computers, 2023)

Tensor Based Multivariate Polynomial Modulo Multiplier for Cryptographic Applications. - Bikram Paul; Angana Nath; Srinivasan Krishnaswamy; Jan Pidanic; Zdenek Nemec; Gaurav Trivedi (IEEE Trans. Computers, 2023)

Multi-objective Hybrid Particle Swarm Optimization and its Application to Analog and RF Circuit Optimization. - Deepak Joshi; Satyabrata Dash; Sushanth Reddy; Rahul Manigilla; Gaurav Trivedi (Circuits Syst. Signal Process., 2023)

Fast power density aware three-dimensional integrated circuit floorplanning for hard macroblocks using best operator combination genetic algorithm. - Naorem Yaipharenba Meitei; Krishna Lal Baishnab; Gaurav Trivedi (Int. J. Circuit Theory Appl., 2023)

FPGA Implementation of Modified SNOW 3G Stream Ciphers Using Fast and Resource Efficient Substitution Box. - Sushree Sila P. Goswami; Gaurav Trivedi (IEEE Embed. Syst. Lett., 2023)

ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing. - Ashvinikumar Dongre; Bipul Boro; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

An Optimized Low-Power VLSI Architecture for ECG/VCG Data Compression for IoHT Wearable Device Application. - Meenali Janveja; Ashwani Kumar Sharma; Abhyuday Bhardwaj; Jan Pidanic; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2023)

IoT-Enabled RC4-Stream-Cipher Powered Edge Data Encryption for Smart Home. - Praveen Tiwari; Maria Kiran Kocherla; Shyra Nandanapu; Pinakeswar Mahanta; Gaurav Trivedi (ICECET, 2024)

Reprogrammable Time-Domain RRAM Based Vector Matrix Multiplier for In-Memory Computing. - Bipul Boro; Rushik Parmar; Ashvinikumar Dongre; Gaurav Trivedi (ISQED, 2024)

Rapid Prototyping of CRYSTALS-Kyber Primitives on FPGA using Python-only HW-SW Flow. - Dhruva S. Hegde; Mandar Datar 001; Manish Prajapati; Sachin B. Patkar; Gaurav Trivedi (VDAT, 2024)

Towards Leveraging Large Language Models for Automated Medical Q&A Evaluation. - Jack Krolik; Herprit Mahal; Feroz Ahmad; Gaurav Trivedi; Bahador Saket (CoRR, 2024)

Low complexity, high throughput, energy efficient, pipelined and reconfigurable ASIC realization architecture for multi-layer perceptron models. - Raghuvendra Pratap Tripathi; Virat Krishna; Manish Tiwari; Gaurav Trivedi; Amit Dhawan; Prashant Kumar (Neurocomputing, 2024)

An SNN-Inspired Area- and Power-Efficient VLSI Architecture of Myocardial Infarction Classifier for Wearable Devices. - Rushik Parmar; Khushil Yadav; Gauraangi Anand; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2024)

A Low-Power Co-Processor to Predict Ventricular Arrhythmia for Wearable Healthcare Devices. - Meenali Janveja; Rushik Parmar; Srichandan Dash; Jan Pidanic; Gaurav Trivedi (IEEE Trans. Very Large Scale Integr. Syst., 2024)

Accelerating Equation Solvers using Gauss-Jacobi on Multi-FPGA Systems with Ring NoC. - Shruti Patkar; Harsh; Souraja Kundu; Gaurav Trivedi (ISVLSI, 2025)

Hardware-Optimized Regression Tree-Based Sigmoid and Tanh Functions for Machine Learning Applications. - Akash Dev Roshan; Prithwijit Guha; Gaurav Trivedi (IEEE Trans. Circuits Syst. II Express Briefs, 2025)