Case Study: Efficient SDD test generation for very large integrated circuits. - Ke Peng; Fang Bao; Geoff Shofner; LeRoy Winemberg; Mohammad Tehranipoor (VTS, 2011)

Fault analysis and simulation of large scale industrial mixed-signal circuits. - Ender Yilmaz; Geoff Shofner; LeRoy Winemberg; Sule Ozev (DATE, 2013)

Putting wasted clock cycles to use: Enhancing fortuitous cell-aware fault detection with scan shift capture. - Fanchen Zhang; Daphne Hwong; Yi Sun; Allison Garcia; Soha Alhelaly; Geoff Shofner; LeRoy Winemberg; Jennifer Dworak (ITC, 2016)