Cryogenic SiGe Hetero-Junction Bipolar Transistors From Standard Technologies For Low Noise FLL. - Damien Prele; Gérard Sou; Geoffroy Klisnick; Michel Redon; Eric Breelle; Michel Piat; Fabrice Voisin (ICECS, 2006)

Current conveyor with very low output impedance voltage buffer for laboratory instrumentation. - Vratislav Michal; Geoffroy Klisnick; Gérard Sou; Michel Redon; Jirí Sedlácek (ISCAS, 2010)

Energy efficient fJ/spike LTS e-Neuron using 55-nm node. - Pietro M. Ferreira; Nathan De Carvalho; Geoffroy Klisnick; Aziz Benlarbi-Delaï (SBCCI, 2019)

Pixel circuit design for an accumulation mode BDJ APS in a 0.18µm CMOS technology. - Oussama Moudda Azzem; Mohamed Ben Chouikha; Caroline Lelandais-Perrault; Anthony Kolar; Hakeim Talleb; Geoffroy Klisnick (ICECS, 2020)

A comparative study between E-neurons mathematical model and circuit model. - Mojtaba Daliri; Pietro M. Ferreira; Geoffroy Klisnick; Aziz Benlarbi-Delaï (IET Circuits Devices Syst., 2021)

Smart IoT - Implementation of Neuromorphic Circuits. - Artur Piana; Siqi Wang; Joao Frischenbruder Sulzbach; Paolo Zaniboni; Raphael El-Haddad; Aziz Benlarbi-Delaï; Geoffroy Klisnick; Pietro M. Ferreira (RTSI, 2022)

Sub-nJ per Decision Schmitt Trigger Comparator for Neuromorphic Spike Detection in 55 nm Technology. - Joao Frischenbruder Sulzbach; Siqi Wang; Zalfa Jouni; Aziz Benlarbi-Delaï; Geoffroy Klisnick; Pietro M. Ferreira (RTSI, 2022)

Noise-Optimized Neuromorphic Spiking Radio in Context-Aware IoT. - Pietro M. Ferreira; Zalfa Jouni; Siqi Wang; Geoffroy Klisnick; Aziz Benlarbi-Delaï (IEEE Des. Test, 2025)