A 30-40 GHz fractional-N frequency synthesizer development using a Verilog-A high-level design methodology. - George Gal; Omar Abdelfattah; Gordon W. Roberts (MWSCAS, 2012)

A Top-Down Design Methodology Encompassing Components Variations Due to Wide-Range Operation in Frequency Synthesizer PLLs. - Omar Abdelfattah; George Gal; Gordon W. Roberts; Ishiang Shih; Yi-Chi Shih (IEEE Trans. Very Large Scale Integr. Syst., 2016)