A high performance 0.35-μm 3.3-V BiCMOS technology optimized for product porting from a 0.6-μm 3.3-V BiCMOS technology. - Jashojiban Banik; Keng L. Wong; George L. Geannopoulos; Chung Y. Joseph Yip (IEEE J. Solid State Circuits, 1996)

Low voltage swing logic circuits for a Pentium 4 processor integer core. - Daniel J. Deleganes; Micah Barany; George L. Geannopoulos; Kurt Kreitzer; Anant P. Singh; Sapumal B. Wijeratne (DAC, 2004)

Low-voltage swing logic circuits for a Pentium® 4 processor integer core. - Daniel J. Deleganes; Micah Barany; George L. Geannopoulos; Kurt Kreitzer; Matthew Morrise; Dan Milliron; Anant P. Singh; Sapumal B. Wijeratne (IEEE J. Solid State Circuits, 2005)

Temperature Sensor Design in a High Volume Manufacturing 65nm CMOS Digital Process. - David E. Duarte; George L. Geannopoulos; Usman Mughal; Keng L. Wong; Greg Taylor (CICC, 2007)

Advanced thermal sensing circuit and test techniques used in a high performance 65nm processor. - David E. Duarte; Greg Taylor; Keng L. Wong; Usman Mughal; George L. Geannopoulos (ISLPED, 2007)

A Compact First-Order ΣΔ Modulator for Analog High-Volume Testing of Complex System-on-Chips in a 14 nm Tri-Gate Digital CMOS Process. - Takao Oshita; Joseph Shor; David E. Duarte; Avner Kornfeld; George L. Geannopoulos; Jonathan Douglas; Nasser A. Kurd (IEEE J. Solid State Circuits, 2016)