A multilayered ceramic (MLC) interface design for 125+MHz performance wafer probing [of SRAMs]. - George M. Belansek; Peter Loomis; Fred J. Towler; Charles Warner; Donald Wheeler (VTS, 1991)

Embedded DRAM built in self test and methodology for test insertion. - Peter Jakobsen; Jeffrey H. Dreibelbis; Gary Pomichter; Darren Anand; John Barth 001; Michael R. Nelms; Jeffrey Leach; George M. Belansek (ITC, 2001)

Embedded DRAM design and architecture for the IBM 0.11-µm ASIC offering. - John E. Barth Jr.; Jeffrey H. Dreibelbis; Eric A. Nelson; Darren Anand; Gary Pomichter; Peter Jakobsen; Michael R. Nelms; Jeffrey Leach; George M. Belansek (IBM J. Res. Dev., 2002)