George Papadimitriou
Orcid: 0000-0002-3772-5019Affiliations:
- University of Athens, Department of Informatics and Telecommunications, Greece
According to our database1,
George Papadimitriou
authored at least 44 papers
between 2016 and 2024.
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Bibliography
2024
Gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures.
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2024
2023
IEEE Trans. Computers, November, 2023
IEEE Trans. Emerg. Top. Comput., 2023
CoRR, 2023
Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services.
CoRR, 2023
NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
CoRR, 2023
Computer, 2023
Proceedings of the 41st IEEE VLSI Test Symposium, 2023
Proceedings of the 56th Annual IEEE/ACM International Symposium on Microarchitecture, 2023
Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures.
Proceedings of the IEEE International Test Conference, 2023
Proceedings of the 29th International Symposium on On-Line Testing and Robust System Design, 2023
Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs.
Proceedings of the IEEE International Symposium on Workload Characterization, 2023
Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, 2023
EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS.
Proceedings of the IEEE European Test Symposium, 2023
Validation, Verification, and Testing (VVT) of future RISC-V powered cloud infrastructures: the Vitamin-V Horizon Europe Project perspective.
Proceedings of the IEEE European Test Symposium, 2023
VITAMIN-V: Virtual Environment and Tool-Boxing for Trustworthy Development of RISC-V Based Cloud Services.
Proceedings of the 26th Euromicro Conference on Digital System Design, 2023
2022
On the Evaluation of the Total-Cost-of-Ownership Trade-Offs in Edge vs Cloud Deployments: A Wireless-Denial-of-Service Case Study.
IEEE Trans. Sustain. Comput., 2022
IEEE Trans. Sustain. Comput., 2022
Soft Error Effects on Arm Microprocessors: Early Estimations versus Chip Measurements.
IEEE Trans. Computers, 2022
IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming.
Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture, 2022
gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs.
Proceedings of the International IEEE Symposium on Performance Analysis of Systems and Software, 2022
2021
A System-Level Voltage/Frequency Scaling Characterization Framework for Multicore CPUs.
CoRR, 2021
The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2021
Demystifying the System Vulnerability Stack: Transient Fault Effects Across the Layers.
Proceedings of the 48th ACM/IEEE Annual International Symposium on Computer Architecture, 2021
Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors.
Proceedings of the IEEE International Symposium on Workload Characterization, 2021
Characterizing Soft Error Vulnerability of CPUs Across Compiler Optimizations and Microarchitectures.
Proceedings of the IEEE International Symposium on Workload Characterization, 2021
2020
CoRR, 2020
2019
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2019
Proceedings of the 25th IEEE International Symposium on On-Line Testing and Robust System Design, 2019
Proceedings of the IEEE International Symposium on Workload Characterization, 2019
Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs.
Proceedings of the 25th IEEE International Symposium on High Performance Computer Architecture, 2019
Demystifying Soft Error Assessment Strategies on ARM CPUs: Microarchitectural Fault Injection vs. Neutron Beam Experiments.
Proceedings of the 49th Annual IEEE/IFIP International Conference on Dependable Systems and Networks, 2019
2018
IEEE Comput. Archit. Lett., 2018
Micro-Viruses for Fast System-Level Voltage Margins Characterization in Multicore CPUs.
Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2018
Proceedings of the 24th IEEE International Symposium on On-Line Testing And Robust System Design, 2018
Proceedings of the 36th IEEE International Conference on Computer Design, 2018
Proceedings of the 48th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops, 2018
An energy-efficient and error-resilient server ecosystem exceeding conservative scaling limits.
Proceedings of the 2018 Design, Automation & Test in Europe Conference & Exhibition, 2018
2017
Proceedings of the 50th Annual IEEE/ACM International Symposium on Microarchitecture, 2017
Proceedings of the 23rd IEEE International Symposium on On-Line Testing and Robust System Design, 2017
2016
Microprocessor reliability-performance tradeoffs assessment at the microarchitecture level.
Proceedings of the 34th IEEE VLSI Test Symposium, 2016
ISA-independent post-silicon validation for the address translation mechanisms of modern microprocessors.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016
Unveiling difficult bugs in address translation caching arrays for effective post-silicon validation.
Proceedings of the 34th IEEE International Conference on Computer Design, 2016