Heuristic techniques for accelerating hierarchical routing on road networks. - George Rosario Jagadeesh; Thambipillai Srikanthan; K. H. Quek (IEEE Trans. Intell. Transp. Syst., 2002)

A Short Course on Implementing FPGA Based Digital Systems. - George Rosario Jagadeesh; Siew Kei Lam; Thambipillai Srikanthan (ICPADS, 2008)

A Low-Complexity Speaker-and-Word Recognition Application for Resource-Constrained Devices. - George Rosario Dhinesh; George Rosario Jagadeesh; Thambipillai Srikanthan (ISED, 2011)

Field programmable gate array-based acceleration of shortest-path computation. - George Rosario Jagadeesh; Thambipillai Srikanthan; C. M. Lim (IET Comput. Digit. Tech., 2011)

Robust real-time route inference from sparse vehicle position data. - George Rosario Jagadeesh; Thambipillai Srikanthan (ITSC, 2014)

Probabilistic Map Matching of Sparse and Noisy Smartphone Location Data. - George Rosario Jagadeesh; Thambipillai Srikanthan (ITSC, 2015)

Heuristic optimizations for high-speed low-latency online map matching with probabilistic sequence models. - George Rosario Jagadeesh; Thambipillai Srikanthan (ITSC, 2016)

Online Map-Matching of Noisy and Sparse Location Data With Hidden Markov and Route Choice Models. - George Rosario Jagadeesh; Thambipillai Srikanthan (IEEE Trans. Intell. Transp. Syst., 2017)

Fast Computation of Clustered Many-to-many Shortest Paths and Its Application to Map Matching. - George Rosario Jagadeesh; Thambipillai Srikanthan (ACM Trans. Spatial Algorithms Syst., 2019)

Map matching imprecise trajectories for smart mobility applications - George Rosario Jagadeesh (2019)

A Computationally Efficient Formulation for Traffic Signal Timing Optimization of an Isolated Intersection. - George Rosario Jagadeesh; Jielin Yang; Kien Ming Ng; Kim Leng Poh; Zhengyu Yang 006; Teck-Hou Teng; Zhibing Zhuo (CoDIT, 2022)

Traffic State Prediction of Perturbed and Non-perturbed Traffic Scenarios. - Teck-Hou Teng; George Rosario Jagadeesh; Thakkar Kunal; Chong Chee Chung (IntelliSys (1), 2023)