Design of a High-Speed Asynchronous Turbo Decoder. - Pankaj Golani; Georgios D. Dimou; Mallika Prakash; Peter A. Beerel (ASYNC, 2007)

Proteus: An ASIC Flow for GHz Asynchronous Designs. - Peter A. Beerel; Georgios D. Dimou; Andrew Lines (IEEE Des. Test Comput., 2011)

A 72-Port 10G Ethernet Switch/Router Using Quasi-Delay-Insensitive Asynchronous Design. - Mike Davies 002; Andrew Lines; Jon Dama; Alain Gravel; Robert Southworth; Georgios D. Dimou; Peter A. Beerel (ASYNC, 2014)

Performance-Driven Clustering of Asynchronous Circuits. - Georgios D. Dimou; Peter A. Beerel; Andrew Lines (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014)

Loihi: A Neuromorphic Manycore Processor with On-Chip Learning. - Mike Davies 002; Narayan Srinivasa; Tsung-Han Lin; Gautham N. Chinya; Yongqiang Cao; Sri Harsha Choday; Georgios D. Dimou; Prasad Joshi; Nabil Imam; Shweta Jain 005; Yuyun Liao; Chit-Kwan Lin; et al. (IEEE Micro, 2018)

BASALISC: Flexible Asynchronous Hardware Accelerator for Fully Homomorphic Encryption. - Robin Geelen; Michiel Van Beirendonck; Hilder V. L. Pereira; Brian Huffman; Tynan McAuley; Ben Selfridge; Daniel Wagner 001; Georgios D. Dimou; Ingrid Verbauwhede; Frederik Vercauteren; David W. Archer (IACR Cryptol. ePrint Arch., 2022)

Island-based Random Dynamic Voltage Scaling vs ML-Enhanced Power Side-Channel Attacks. - Dake Chen; Christine Goins; Maxwell Waugaman; Georgios D. Dimou; Peter A. Beerel (ACM Great Lakes Symposium on VLSI, 2023)

BASALISC: Programmable Hardware Accelerator for BGV Fully Homomorphic Encryption. - Robin Geelen; Michiel Van Beirendonck; Hilder V. L. Pereira; Brian Huffman; Tynan McAuley; Ben Selfridge; Daniel Wagner 001; Georgios D. Dimou; Ingrid Verbauwhede; Frederik Vercauteren; David W. Archer (IACR Trans. Cryptogr. Hardw. Embed. Syst., 2023)