Loop Scheduling for Multithreaded Processors - Georgios Dimitriou (2000)

Loop Scheduling for Multithreaded Processors. - Georgios Dimitriou; Constantine D. Polychronopoulos (PARELEC, 2004)

A Tool for Calculating Energy Consumption in Wireless Sensor Networks. - Georgios Dimitriou; Panayotis Kikiras; Georgios I. Stamoulis; John N. Avaritsiotis (Panhellenic Conference on Informatics, 2005)

Hardware Support for Multithreaded Execution of Loops with Limited Parallelism. - Georgios Dimitriou; Constantine D. Polychronopoulos (Panhellenic Conference on Informatics, 2005)

Rapid, low-power loop execution in a network of functional units. - Athanassios Tziouvaras; Georgios Dimitriou (Panhellenic Conference on Informatics, 2013)

Hardware synthesis of high-level C constructs. - Michael F. Dossis; Georgios Dimitriou (Panhellenic Conference on Informatics, 2015)

Performance and power simulation of a functional-unit-network processor with simplescalar and wattch. - Kleovoulos Kalaitzidis; Georgios Dimitriou; Georgios I. Stamoulis; Michael F. Dossis (Panhellenic Conference on Informatics, 2015)

Source-Level Compiler Optimizations for High-Level Synthesis. - Georgios Dimitriou; Georgios Chatzianastasiou; Apostolos Tsakyridis; Georgios I. Stamoulis; Michael F. Dossis (SEEDA-CECNSM, 2016)

SER Analysis of Multiple Transient Faults in Combinational Logic. - Georgios Ioannis Paliaroutis; Pelopidas Tsoumanis; George Dimitriou; Georgios I. Stamoulis (SEEDA-CECNSM, 2016)

Loop pipelining in high-level synthesis with CCC. - Georgios Dimitriou; Michael F. Dossis; Georgios I. Stamoulis (MOCAST, 2017)

Placement-based SER estimation in the presence of multiple faults in combinational logic. - Georgios Ioannis Paliaroutis; Pelopidas Tsoumanis; Nestor E. Evmorfopoulos; George Dimitriou; Georgios I. Stamoulis (PATMOS, 2017)

A Placement-Aware Soft Error Rate Estimation of Combinational Circuits for Multiple Transient Faults in CMOS Technology. - Georgios Ioannis Paliaroutis; Pelopidas Tsoumanis; Nestor E. Evmorfopoulos; George Dimitriou; Georgios I. Stamoulis (DFT, 2018)

Operation Dependencies in Loop Pipelining for High-Level Synthesis. - Georgios Dimitriou; Michael F. Dossis; Georgios I. Stamoulis (SEEDA-CECNSM, 2018)

Resolving Loop Pipelining Issues in the CCC High-level Synthesis E-CAD Framework. - Michael F. Dossis; Georgios Dimitriou (TSP, 2018)

Multiple Transient Faults in Combinational Logic with Placement Considerations. - Georgios Ioannis Paliaroutis; Pelopidas Tsoumanis; Nestor E. Evmorfopoulos; George Dimitriou; Georgios I. Stamoulis (MOCAST, 2019)

Instruction-Based Timing Analysis in Pipelined Processors. - Athanassios Tziouvaras; Georgios Dimitriou; Michael F. Dossis; Georgios I. Stamoulis (SEEDA-CECNSM, 2019)

Adaptive Operation-Based ALU and FPU Clocking. - Athanassios Tziouvaras; Georgios Dimitriou; Michael F. Dossis; Georgios I. Stamoulis (MOCAST, 2020)

From Cyber Terrorism to Cyber Peacekeeping: Are we there yet? - Maria Papathanasaki; Georgios Dimitriou; Leandros Maglaras; Ismini Vasileiou; Helge Janicke (PCI, 2020)

Low power general purpose loop acceleration for NDP applications. - Athanasios Tziouvaras; Georgios Dimitriou; Fotis Foukalas; Georgios I. Stamoulis (PCI, 2020)

Global and Pointer Variables in High-Level Synthesis. - Georgios Dimitriou; Michael F. Dossis; Georgios I. Stamoulis (SEEDA-CECNSM, 2020)

Branchless Code Generation for Modern Processor Architectures. - Alexandros Angelou; Antonios N. Dadaliaris; Michael F. Dossis; Georgios Dimitriou (PCI, 2021)

Statistical Estimation of Leakage Power Bounds in CMOS VLSI Circuits. - Dimitrios Bountas; Nestor E. Evmorfopoulos; George Dimitriou; Antonios N. Dadaliaris; George Floros 002; Georgios I. Stamoulis (PCI, 2021)

Juxtaposing Vivado Design Flows in Batch Mode. - Antonios N. Dadaliaris; Antonios Tragoudaras; George K. Kranas; Michael F. Dossis; Georgios Dimitriou (PCI, 2021)

The implementation of the flipped classroom model in the teaching of educational robotics: A study in secondary school students. - Dimitrios A. Varsos; Georgios Dimitriou; Nikolaos C. Zygouris (EDUCON, 2022)

Near Data Processing Performance Improvement Prediction via Metric-Based Workload Classification. - Dimitrios Papalekas; Athanasios Tziouvaras; George Floros 002; Georgios Dimitriou; Michael F. Dossis; Georgios I. Stamoulis (MOCAST, 2022)

Design Space Exploration of a Sparse MobileNetV2 Using High-Level Synthesis and Sparse Matrix Techniques on FPGAs. - Antonios Tragoudaras; Pavlos Stoikos; Konstantinos Fanaras; Athanasios Tziouvaras; George Floros 002; Georgios Dimitriou; Kostas Kolomvatsos; Georgios I. Stamoulis (Sensors, 2022)

Low-power Near-data Instruction Execution Leveraging Opcode-based Timing Analysis. - Athanasios Tziouvaras; Georgios Dimitriou; Georgios I. Stamoulis (ACM Trans. Archit. Code Optim., 2022)

Implementing a Web Application Screener for Preschoolers: Executive Functions and School Readiness. - Nikolaos C. Zygouris; Kafenia Botsoglou; Georgios Dimitriou; Olympia Axelou; Panagiotis Oikonomou; Eleftheria Beazidou; Grigoris D. Tziallas (Int. J. Eng. Pedagog., 2023)

Improved Text Emotion Prediction Using Combined Valence and Arousal Ordinal Classification. - Michail Mitsios; Georgios Vamvoukakis; Georgia Maniati; Nikolaos Ellinas; Georgios Dimitriou; Konstantinos Markopoulos; Panos Kakoulidis; Alexandra Vioni; Myrsini Christidou; Junkwang Oh; Gunu Jho; Inchul Hwang; et al. (NAACL (Short Papers), 2024)

Current Status of Analytical FPGA Placement. - Kosmas Kariotis; Antonios N. Dadaliaris; George K. Kranas; George Dimitriou; Michael F. Dossis (SEEDA-CECNSM, 2024)

Improved Text Emotion Prediction Using Combined Valence and Arousal Ordinal Classification. - Michael Mitsios; Georgios Vamvoukakis; Georgia Maniati; Nikolaos Ellinas; Georgios Dimitriou; Konstantinos Markopoulos; Panos Kakoulidis; Alexandra Vioni; Myrsini Christidou; Junkwang Oh; Gunu Jho; Inchul Hwang; et al. (CoRR, 2024)