Writing without Disturb on Phase Change Memories by Integrating Coding and Layout Design. - Ali Eslami; Alfredo Velasco; Alireza Vahid; Georgios Mappouras; A. Robert Calderbank; Daniel J. Sorin (MEMSYS, 2015)

Methuselah Flash: Rewriting Codes for Extra Long Storage Lifetime. - Georgios Mappouras; Alireza Vahid; A. Robert Calderbank; Daniel J. Sorin (DSN, 2016)

Jenga: Efficient Fault Tolerance for Stacked DRAM. - Georgios Mappouras; Alireza Vahid; A. Robert Calderbank; Derek R. Hower; Daniel J. Sorin (ICCD, 2017)

Correcting Two Deletions and Insertions in Racetrack Memory. - Alireza Vahid; Georgios Mappouras; Daniel J. Sorin; A. Robert Calderbank (CoRR, 2017)

Extending Flash Lifetime in Embedded Processors by Expanding Analog Choice. - Georgios Mappouras; Alireza Vahid; A. Robert Calderbank; Daniel J. Sorin (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018)

GreenFlag: Protecting 3D-Racetrack Memory from Shift Errors. - Georgios Mappouras; Alireza Vahid; A. Robert Calderbank; Daniel J. Sorin (DSN, 2019)

Foosball Coding: Correcting Shift Errors and Bit Flip Errors in 3D Racetrack Memory. - Samantha Archer; Georgios Mappouras; A. Robert Calderbank; Daniel J. Sorin (DSN, 2020)

Turing Test 2.0: The General Intelligence Threshold. - Georgios Mappouras (CoRR, 2025)