Parametric failure analysis of embedded SRAMs using fast & accurate dynamic analysis. - Elena I. Vatajelu; Georgios Panagopoulos; Kaushik Roy 001; Joan Figueras (ETS, 2010)

HERQULES: system level cross-layer design exploration for efficient energy-quality trade-offs. - Georgios Karakonstantis; Georgios Panagopoulos; Kaushik Roy 001 (ISLPED, 2010)

Multi-level wordline driver for low power SRAMs in nano-scale CMOS technology. - Farshad Moradi; Georgios Panagopoulos; Georgios Karakonstantis; Dag T. Wisland; Hamid Mahmoodi; Jens Kargaard Madsen; Kaushik Roy 001 (ICCD, 2011)

Low-power functionality enhanced computation architecture using spin-based devices. - Charles Augustine; Georgios Panagopoulos; Behtash Behin-Aein; Srikant Srinivasan; Angik Sarkar; Kaushik Roy 001 (NANOARCH, 2011)

Cognitive computing with spin-based neural networks. - Mrigank Sharad; Charles Augustine; Georgios Panagopoulos; Kaushik Roy 001 (DAC, 2012)

A framework for simulating hybrid MTJ/CMOS circuits: Atoms to system approach. - Georgios Panagopoulos; Charles Augustine; Kaushik Roy 001 (DATE, 2012)

Spin based neuron-synapse module for ultra low power programmable computational networks. - Mrigank Sharad; Charles Augustine; Georgios Panagopoulos; Kaushik Roy 001 (IJCNN, 2012)

Write-optimized reliable design of STT MRAM. - Yusung Kim 002; Sumeet Kumar Gupta; Sang Phill Park; Georgios Panagopoulos; Kaushik Roy 001 (ISLPED, 2012)

Ultra low energy analog image processing using spin based neurons. - Mrigank Sharad; Charles Augustine; Georgios Panagopoulos; Kaushik Roy 001 (NANOARCH, 2012)

Proposal For Neuromorphic Hardware Using Spin Devices - Mrigank Sharad; Charles Augustine; Georgios Panagopoulos; Kaushik Roy 001 (CoRR, 2012)

Challenges of RF and mixed signal design under process variability. - Georgios Panagopoulos; Phillipp Riess; Peter Baumgartner 002 (IOLTS, 2013)

Multi-level wordline driver for robust SRAM design in nano-scale CMOS technology. - Farshad Moradi; Georgios Panagopoulos; Georgios Karakonstantis; Hooman Farkhani; Dag T. Wisland; Jens Kargaard Madsen; Hamid Mahmoodi; Kaushik Roy 001 (Microelectron. J., 2014)

A 40nW, Sub-IV Truly 'Digital' Reverse Bandgap Reference Using Bulk-Diodes in 16nm FinFET. - Matthias Eberlein; Georgios Panagopoulos; Harald Pretl (A-SSCC, 2018)

Learning Influence Representations : Methods and Applciations. (Apprentissage des représentations d'influence : méthodes et applications). - Georgios Panagopoulos (2022)

A 4.8ps Resolution, PVT-insensitive Vernier-based TDC using switched-RO PLL and Back Gate Calibration. - Patroklos Pazionis; Andreas Tsimpos; Gerasimos Theodoratos; Georgios Panagopoulos (ISVLSI, 2025)

28 GHz Low-Phase Noise QVCO in 22nm FD-SOI Using Back-Gate Coupling. - Georgios Panagopoulos; Vasileios Chondrorizos; Vasileios Manouras; Yannis Papananos (MOCAST, 2025)