Georgios Zacharopoulos

Orcid: 0000-0002-6644-5200

According to our database1, Georgios Zacharopoulos authored at least 10 papers between 2016 and 2023.

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Bibliography

2023
Graph Neural Networks for High-Level Synthesis Design Space Exploration.
ACM Trans. Design Autom. Electr. Syst., March, 2023

Early DSE and Automatic Generation of Coarse-grained Merged Accelerators.
ACM Trans. Embed. Comput. Syst., March, 2023

Trireme: Exploration of Hierarchical Multi-level Parallelism for Hardware Acceleration.
ACM Trans. Embed. Comput. Syst., 2023

ReDSEa: Automated Acceleration of Triangular Solver on Supercloud Heterogeneous Systems.
CoRR, 2023

2022
Trireme: Exploring Hierarchical Multi-Level Parallelism for Domain Specific Hardware Acceleration.
CoRR, 2022

2021
A Graph Deep Learning Framework for High-Level Synthesis Design Space Exploration.
CoRR, 2021

2019
RegionSeeker: Automatically Identifying and Selecting Accelerators From Application Source Code.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019

Compiler-Assisted Selection of Hardware Acceleration Candidates from Application Source Code.
Proceedings of the 37th IEEE International Conference on Computer Design, 2019

2018
Machine Learning Approach for Loop Unrolling Factor Prediction in High Level Synthesis.
Proceedings of the 2018 International Conference on High Performance Computing & Simulation, 2018

2016
Multiversioned decoupled access-execute: the key to energy-efficient compilation of general-purpose programs.
Proceedings of the 25th International Conference on Compiler Construction, 2016


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