5.5GHz system z microprocessor and multi-chip module. - James D. Warnock; Yuen H. Chan; Hubert Harrer; David L. Rude; Ruchir Puri; Sean M. Carey; Gerard Salem; Guenter Mayer; Yiu-Hing Chan; Mark D. Mayo; Adam Jatkowski; Gerald Strevig; et al. (ISSCC, 2013)

Circuit and Physical Design of the zEnterprise™ EC12 Microprocessor Chips and Multi-Chip Module. - James D. Warnock; Yuen H. Chan; Hubert Harrer; Sean M. Carey; Gerard Salem; Doug Malone; Ruchir Puri; Jeffrey A. Zitz; Adam Jatkowski; Gerald Strevig; Ayan Datta; Anne Gattiker; et al. (IEEE J. Solid State Circuits, 2014)

4.1 22nm Next-generation IBM System z microprocessor. - James D. Warnock; Brian W. Curran; John Badar; Gregory Fredeman; Donald W. Plass; Yuen H. Chan; Sean M. Carey; Gerard Salem; Friedrich Schroeder; Frank Malgioglio; Guenter Mayer; Christopher J. Berry; et al. (ISSCC, 2015)

IBM z13 circuit design and methodology. - James D. Warnock; Christopher J. Berry; Michael H. Wood; Leon J. Sigal; Yun-Chan Myung; Guenter Mayer; Mark D. Mayo; Y. Chan; Frank Malgioglio; Gerald Strevig; Charudhattan Nagarajan; Sean M. Carey; et al. (IBM J. Res. Dev., 2015)

IBM z15: Physical design improvements to significantly increase content in the same technology. - Christopher J. Berry; David Wolpert 001; Brian Bell 001; Adam Jatkowski; Jesse Surprise; Gerald Strevig; John Isakson; Ofer Geva; Brian Deskin; Mark Cichanowski; Giora Biran; Dina Hamid; et al. (IBM J. Res. Dev., 2020)

POWER10™: A 16-Core SMT8 Server Processor With 2TB/s Off-Chip Bandwidth in 7nm Technology. - Rahul M. Rao; Christopher J. Gonzalez; Eric Fluhr; Abraham Mathews; Andrew Bianchi; Daniel Dreps; David Wolpert 001; Eric Lai; Gerald Strevig; Glen A. Wiedemeier; Philipp Salz; Ryan Kruse (ISSCC, 2022)

37.1 IBM Telum II Processor Design-Technology Co-Optimizations for Power, Performance, Area, and Reliability. - David Wolpert 001; Gerry Strevig; Christopher J. Berry; Leon J. Sigal; Bill Huott; Mark Cichanowski; Matthias Pflanz; Tobias Werner 001; Philipp Salz; Nick Jinq; Michael Romain; Iris Leefken; et al. (ISSCC, 2025)

2.2 IBM Telum II: Next Generation 5.5GHz Microprocessor with On-Die Data Processing Unit and Improved AI Accelerator. - Gerald Strevig; Christopher J. Berry; Rahul M. Rao; Noam Jungmann; Michael A. Sperling; Michael J. Becht; Eduard Herkel; Matthias Pflanz; Patrick J. Meaney; Michael Romain; Mark Cichanowski; Amanda Venton; et al. (ISSCC, 2025)