Toward an Open-Source Digital Flow: First Learnings from the OpenROAD Project. - Tutu Ajayi; Vidya A. Chhabria; Mateus Fogaça; Soheil Hashemi; Abdelrahman Hosny; Andrew B. Kahng; Minsoo Kim; Jeongsup Lee; Uday Mallappa; Marina Neseem; Geraldo Pradipta; Sherief Reda; et al. (DAC, 2019)

Generative self-supervised learning for gate sizing: invited. - Siddhartha Nath; Geraldo Pradipta; Corey Hu; Tian Yang; Brucek Khailany; Haoxing Ren (DAC, 2022)

TransSizer: A Novel Transformer-Based Fast Gate Sizer. - Siddhartha Nath; Geraldo Pradipta; Corey Hu; Tian Yang; Brucek Khailany; Haoxing Ren (ICCAD, 2022)

Invited Paper: CircuitOps: An ML Infrastructure Enabling Generative AI for VLSI Circuit Optimization. - Rongjian Liang; Anthony Agnesina; Geraldo Pradipta; Vidya A. Chhabria; Haoxing Ren (ICCAD, 2023)

AutoDMP: Automated DREAMPlace-based Macro Placement. - Anthony Agnesina; Puranjay Rajvanshi; Tian Yang; Geraldo Pradipta; Austin Jiao; Ben Keller; Brucek Khailany; Haoxing Ren (ISPD, 2023)

2024 ICCAD CAD Contest Problem C: Scalable Logic Gate Sizing Using ML Techniques and GPU Acceleration. - Bing-Yue Wu; Rongjian Liang; Geraldo Pradipta; Anthony Agnesina; Haoxing Ren; Vidya A. Chhabria (ICCAD, 2024)

GOALPlace: Begin with the End in Mind. - Anthony Agnesina; Rongjian Liang; Geraldo Pradipta; Anand Rajaram; Haoxing Ren (ISPD, 2025)

LEGO-Size: LLM-Enhanced GPU-Optimized Signoff-Accurate Differentiable VLSI Gate Sizing in Advanced Nodes. - Yi-Chen Lu; Kishor Kunal; Geraldo Pradipta; Rongjian Liang; Ravikishore Gandikota; Haoxing Ren (ISPD, 2025)