Content addressable memory : design and usage for general purpose computing. - Gerard M. Blair (1986)

PLA design for single-clock CMOS. - Gerard M. Blair (IEEE J. Solid State Circuits, 1992)

Comments on "A robust single phase clocking for low power, high-speed VLSI applications" [and reply]. - Gerard M. Blair (IEEE J. Solid State Circuits, 1996)

Comments on "New single-clock CMOS latches and flip-flops with improved speed and power savings". - Gerard M. Blair (IEEE J. Solid State Circuits, 1997)

Reduced complexity two-phase micropipeline latch controller. - George S. Taylor; Gerard M. Blair (IEEE J. Solid State Circuits, 1998)

Equal length routing. - Gerard M. Blair (SoCC, 2013)

T2A: Clock implementation: A question of timing. - Gerard M. Blair (SoCC, 2014)