RCM-MVL: A Recursive Consensus MVL Minimization Algorithm. - Gerhard W. Dueck; D. Michael Miller (ISMVL, 1990)

On the Maximum Number of Implicants Needed to Cover a Multiple-Valued Logic Function Using Window Literals. - Gerhard W. Dueck; G. H. John van Rees (ISMVL, 1991)

Direct Cover MVL Minimization with Cost-Tables. - Gerhard W. Dueck (ISMVL, 1992)

Multiple-Valued Programmable Logic Array Minmization by Simulated Annealing. - Gerhard W. Dueck; Robert C. Earle; Parthasarathy P. Tirumalai; Jon T. Butler (ISMVL, 1992)

Multiple-Valued Logic Operations with Universal Literals. - Gerhard W. Dueck; Jon T. Butler (ISMVL, 1994)

Multiple-Valued Logic Minimization using Universal Literals and Cost Tables. - Blair Fraser; Gerhard W. Dueck (ISMVL, 1998)

A Super Switch Algebra for Quantum Device Based Systems. - Gerhard W. Dueck; Mou Hu; Blair Fraser (ISMVL, 1999)

Experiments on FPRM Expressions for Partially Symmetric Logic Functions. - Svetlana N. Yanushkevich; Jon T. Butler; Gerhard W. Dueck; Vlad P. Shmerko (ISMVL, 2000)

Comments on "Sympathy: fast exact minimization of fixedpolarity Reed-Muller expansion for symmetric functions". - Jon T. Butler; Gerhard W. Dueck; Vlad P. Shmerko; Svetlana N. Yanushkevich (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2000)

On the number of generators for transeunt triangles. - Jon T. Butler; Gerhard W. Dueck; Svetlana N. Yanushkevich; Vlad P. Shmerko (Discret. Appl. Math., 2001)

Using simulated annealing to construct extremal graphs. - Ping Wang; Gerhard W. Dueck; S. MacMillan (Discret. Math., 2001)

A transformation based algorithm for reversible logic synthesis. - D. Michael Miller; Dmitri Maslov; Gerhard W. Dueck (DAC, 2003)

Fredkin/Toffoli Templates for Reversible Logic Synthesis. - Dmitri Maslov; Gerhard W. Dueck; D. Michael Miller (ICCAD, 2003)

On the Size of Multiple-Valued Decision Diagrams. - D. Michael Miller; Gerhard W. Dueck (ISMVL, 2003)

Simplification of Toffoli Networks via Templates. - Dmitri Maslov; Gerhard W. Dueck; D. Michael Miller (SBCCI, 2003)

A Synthesis Method for MVL Reversible Logi. - D. Michael Miller; Gerhard W. Dueck; Dmitri Maslov (ISMVL, 2004)

Reversible cascades with minimal garbage. - Dmitri Maslov; Gerhard W. Dueck (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2004)

Quantum Circuit Simplification Using Templates. - Dmitri Maslov; Christina Young; D. Michael Miller; Gerhard W. Dueck (DATE, 2005)

Toffoli network synthesis with templates. - Dmitri Maslov; Gerhard W. Dueck; D. Michael Miller (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2005)

Synthesis of Fredkin-Toffoli reversible networks. - Dmitri Maslov; Gerhard W. Dueck; D. Michael Miller (IEEE Trans. Very Large Scale Integr. Syst., 2005)

Level Compaction in Quantum Circuits. - Dmitri Maslov; Gerhard W. Dueck (IEEE Congress on Evolutionary Computation, 2006)

Synthesis of Quantum Multiple-Valued Circuits. - D. Michael Miller; Dmitri Maslov; Gerhard W. Dueck (J. Multiple Valued Log. Soft Comput., 2006)

Exact sat-based toffoli network synthesis. - Daniel Große; Xiaobo Chen; Gerhard W. Dueck; Rolf Drechsler (ACM Great Lakes Symposium on VLSI, 2007)

Techniques for the synthesis of reversible Toffoli networks. - Dmitri Maslov; Gerhard W. Dueck; D. Michael Miller (ACM Trans. Design Autom. Electr. Syst., 2007)

Quantified Synthesis of Reversible Logic. - Robert Wille; Hoang Minh Le 001; Gerhard W. Dueck; Daniel Große (DATE, 2008)

Pairwise decomposition of toffoli gates in a quantum circuit. - Nathan O. Scott; Gerhard W. Dueck (ACM Great Lakes Symposium on VLSI, 2008)

Exact Synthesis of Elementary Quantum Gate Circuits for Reversible Functions with Don't Cares. - Daniel Große; Robert Wille; Gerhard W. Dueck; Rolf Drechsler (ISMVL, 2008)

RevLib: An Online Resource for Reversible Functions and Reversible Circuits. - Robert Wille; Daniel Große; Lisa Teuber; Gerhard W. Dueck; Rolf Drechsler (ISMVL, 2008)

Quantum Circuit Simplification and Level Compaction. - Dmitri Maslov; Gerhard W. Dueck; D. Michael Miller; Camille Negrevergne (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2008)

Debugging of Toffoli networks. - Robert Wille; Daniel Große; Stefan Frehse; Gerhard W. Dueck; Rolf Drechsler (DATE, 2009)

Synthesizing Reversible Circuits for Irreversible Functions. - D. Michael Miller; Robert Wille; Gerhard W. Dueck (DSD, 2009)

Reversible Logic Synthesis with Output Permutation. - Robert Wille; Daniel Große; Gerhard W. Dueck; Rolf Drechsler (VLSI Design, 2009)

Editorial. - Gerhard W. Dueck (J. Multiple Valued Log. Soft Comput., 2009)

Exact Synthesis of Elementary Quantum Gate Circuits. - Daniel Große; Robert Wille; Gerhard W. Dueck; Rolf Drechsler (J. Multiple Valued Log. Soft Comput., 2009)

Exact Multiple-Control Toffoli Network Synthesis With SAT Techniques. - Daniel Große; Robert Wille; Gerhard W. Dueck; Rolf Drechsler (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009)

Synthesizing multiplier in reversible logic. - Sebastian Offermann; Robert Wille; Gerhard W. Dueck; Rolf Drechsler (DDECS, 2010)

Window optimization of reversible and quantum circuits. - Mathias Soeken; Robert Wille; Gerhard W. Dueck; Rolf Drechsler (DDECS, 2010)

ESOP-Based Toffoli Network Generation with Transformations. - Yasaman Sanaee; Gerhard W. Dueck (ISMVL, 2010)

Two-Qubit Quantum Gates to Reduce the Quantum Cost of Reversible Circuit. - Md. Mazder Rahman; Anindita Banerjee; Gerhard W. Dueck; Anirban Pathak (ISMVL, 2011)

Optimization of Reversible Circuits Using Reconfigured Templates. - Md. Mazder Rahman; Gerhard W. Dueck; Anindita Banerjee (RC, 2011)

Debugging reversible circuits. - Robert Wille; Daniel Große; Stefan Frehse; Gerhard W. Dueck; Rolf Drechsler (Integr., 2011)

An algorithm to find quantum templates. - Md. Mazder Rahman; Gerhard W. Dueck (IEEE Congress on Evolutionary Computation, 2012)

Synthesis of Toffoli Networks: Status and Challenges. - Gerhard W. Dueck (ISED, 2012)

Optimal Quantum Circuits of Three Qubits. - Md. Mazder Rahman; Gerhard W. Dueck (ISMVL, 2012)

Properties of Quantum Templates. - Md. Mazder Rahman; Gerhard W. Dueck (RC, 2012)

Design and Optimization of Single and Multiple-Loop Reversible and Quantum Feedback Circuits. - Majid Mohammadi; Aliakbar Niknafs; Mohammad Eshghi; Gerhard W. Dueck (J. Circuits Syst. Comput., 2012)

Toffoli Gate Implementation Using The Billiard Ball Model. - Hadi Hosseini; Gerhard W. Dueck (J. Multiple Valued Log. Soft Comput., 2012)

Minimal Designs of Reversible Sequential Elements. - Anindita Banerjee; Anirban Pathak; Gerhard W. Dueck (RC, 2014)

Challenges and advances in Toffoli network optimisation. - Gerhard W. Dueck (IET Comput. Digit. Tech., 2014)

An Algorithm for Quantum Template Matching. - Md. Mazder Rahman; Gerhard W. Dueck; Joseph D. Horton (ACM J. Emerg. Technol. Comput. Syst., 2014)

A survey on object cache locality in automated memory management systems. - Marcel Dombrowski; Konstantin Nasartschuk; Kenneth B. Kent; Gerhard W. Dueck (CCECE, 2015)

Metis: a smart memory allocator using historical reclamation information. - Shijie Xu; Qi Guo 001; Gerhard W. Dueck; David Bremner; Yang Wang 006 (ICOOOLPS@ECOOP, 2015)

Dynamic Template Matching with Mixed-Polarity Toffoli Gates. - Md. Mazder Rahman; Mathias Soeken; Gerhard W. Dueck (ISMVL, 2015)

Reversible circuit rewriting with simulated annealing. - Nabila Abdessaied; Mathias Soeken; Gerhard W. Dueck; Rolf Drechsler (VLSI-SoC, 2015)

Synthesis of Linear Nearest Neighbor Quantum Circuits. - Md. Mazder Rahman; Gerhard W. Dueck (CoRR, 2015)

Self-Inverse Functions and Palindromic Circuits. - Mathias Soeken; Michael Kirkedal Thomsen; Gerhard W. Dueck; D. Michael Miller (CoRR, 2015)

Thread-group based local heap garbage collection in a simulated runtime environment. - Marcel Dombrowski; Konstantin Nasartschuk; Kenneth B. Kent; Gerhard W. Dueck; Charlie Gracie (CCECE, 2016)

An extension of transformation-based reversible and quantum circuit synthesis. - Mathias Soeken; Gerhard W. Dueck; Md. Mazder Rahman; D. Michael Miller (ISCAS, 2016)

Fault Detection in Parity Preserving Reversible Circuits. - Nils Przigoda; Gerhard W. Dueck; Robert Wille; Rolf Drechsler (ISMVL, 2016)

Integrated Synthesis of Linear Nearest Neighbor Ancilla-Free MCT Circuits. - Md. Mazder Rahman; Gerhard W. Dueck; Anupam Chattopadhyay; Robert Wille (ISMVL, 2016)

A Fast Symbolic Transformation Based Algorithm for Reversible Logic Synthesis. - Mathias Soeken; Gerhard W. Dueck; D. Michael Miller (RC, 2016)

Trace Files for Automatic Memory Management Systems. - Md. Mazder Rahman; Konstantin Nasartschuk; Kenneth B. Kent; Gerhard W. Dueck (VST@SANER, 2016)

Ancilla-free synthesis of large reversible functions using binary decision diagrams. - Mathias Soeken; Laura Tague; Gerhard W. Dueck; Rolf Drechsler (J. Symb. Comput., 2016)

GarCoSim: A Framework for Automated Memory Management Research and Evaluation. - Konstantin Nasartschuk; Marcel Dombrowski; Tristan Basa; Md. Mazder Rahman; Kenneth B. Kent; Gerhard W. Dueck (EAI Endorsed Trans. Scalable Inf. Syst., 2016)

Building a Completely Reversible Computer. - Martin Lukac; Gerhard W. Dueck; Michitaka Kameyama; Anirban Pathak (CoRR, 2017)

Cold object identification in the Java virtual machine. - Kim T. Briggs; Baoguo Zhou; Gerhard W. Dueck (Softw. Pract. Exp., 2017)

A survey of ahead-of-time technologies in dynamic language environments. - Mark Thom; Gerhard W. Dueck; Kenneth B. Kent; Daryl Maier (CASCON, 2018)

Persistent memory storage of cold regions in the OpenJ9 Java virtual machine. - Scott Ryan Young; Michael Flawn; Gerhard W. Dueck; Kenneth B. Kent; Charlie Gracie (CASCON, 2018)

Optimization of Circuits for IBM's Five-Qubit Quantum Computers. - Gerhard W. Dueck; Anirban Pathak; Md. Mazder Rahman; Abhishek Shukla; Anindita Banerjee (DSD, 2018)

NUMA Awareness: Improving Thread and Memory Management. - Maria Patrou; Kenneth B. Kent; Gerhard W. Dueck; Charlie Gracie; Aleksandar Micic (SEAA, 2018)

DISTIL: a distributed in-memory data processing system for location-based services. - Maria Patrou; Md. Mahbub Alam; Puya Memarzia; Suprio Ray; Virendra C. Bhavsar; Kenneth B. Kent; Gerhard W. Dueck (SIGSPATIAL/GIS, 2018)

Efficient Realizations of CNOT gates in IBM's Quantum Computers. - Alexandre A. A. de Almeida; Gerhard W. Dueck; Alexandre C. R. da Silva (ISED, 2018)

Reversible Circuit Optimization Based on Tabu Search. - Alexandre A. A. de Almeida; Gerhard W. Dueck; Alexandre C. R. da Silva (ISMVL, 2018)

Synthesis of Majority Expressions through Primitive Function Manipulation. - Evandro C. Ferraz; Jeferson de Lima Muniz; Alexandre C. R. da Silva; Gerhard W. Dueck (CoRR, 2018)

Ahead-of-time compilation in OMR: overview and first steps. - Georgiy Krylov; Gerhard W. Dueck; Kenneth B. Kent; Daryl Maier; Irwin D'Souza (CASCON, 2019)

CNOT Gate Mappings to Clifford+T Circuits in IBM Architectures. - Alexandre Araujo Amaral de Almeida; Gerhard W. Dueck; Alexandre C. R. da Silva (ISMVL, 2019)

Efficient Realization of Toffoli and NCV Circuits for IBM QX Architectures. - Alexandre A. A. de Almeida; Gerhard W. Dueck; Alexandre César Rodrigues da Silva (RC, 2019)

Finding optimal qubit permutations for IBM's quantum computer architectures. - Alexandre A. A. de Almeida; Gerhard W. Dueck; Alexandre C. R. da Silva (SBCCI, 2019)

CNOT Gate Optimizations via Qubit Permutations for IBM's Quantum Architectures. - Alexandre A. A. de Almeida; Gerhard W. Dueck; Alexandre C. R. da Silva (J. Low Power Electron., 2019)

An ELF-based storage option for the eclipse OMR ahead-of-time compiler. - Damian Diago D'monte; Georgiy Krylov; Daryl Maier; Gerhard W. Dueck; Kenneth B. Kent (CASCON, 2020)

Towards Exploring the Potential of Alternative Quantum Computing Architectures. - Arighna Deb; Gerhard W. Dueck; Robert Wille (DATE, 2020)

Design Space Exploration in the Mapping of Reversible Circuits to IBM Quantum Computers. - Philipp Niemann 001; Alexandre A. A. de Almeida; Gerhard W. Dueck; Rolf Drechsler (DSD, 2020)

The Evolution of Garbage Collection in V8: Google's JavaScript Engine. - Georgiy Krylov; Maria Patrou; Gerhard W. Dueck; Joran Siu (MECO, 2020)

Cold Object Identification and Segregation using Page Protection and Profiling. - Abhijit Taware; Kenneth B. Kent; Gerhard W. Dueck; Charlie Gracie (MECO, 2020)

Search-Based Transformation Synthesis for 3-Valued Reversible Circuits. - D. Michael Miller; Gerhard W. Dueck (RC, 2020)

A lightweight code storage container for the eclipse OMR ahead-of-time compiler. - Damian Diago D'monte; Georgiy Krylov; Younes Manton; Gerhard W. Dueck; Kenneth B. Kent (CASCON, 2021)

Ahead-of-time compilation in eclipse OMR on example of WebAssembly. - Georgiy Krylov; Petar Jelenkovic; Mark Thom; Gerhard W. Dueck; Kenneth B. Kent; Younes Manton; Daryl Maier (CASCON, 2021)

Descending Order Transformation-based Synthesis of MVL Reversible Circuits. - D. Michael Miller; Gerhard W. Dueck (ISMVL, 2021)

Adaptive Integer Linear Programming Model for Optimal Qubit Permutation. - Alexandre A. A. de Almeida; Gerhard W. Dueck (IEEE Des. Test, 2021)

Function translations and search-based transformation for MVL reversible circuit synthesis. - D. Michael Miller; Gerhard W. Dueck (Sci. Comput. Program., 2021)

Exploring the Potential Benefits of Alternative Quantum Computing Architectures. - Arighna Deb; Gerhard W. Dueck; Robert Wille (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2021)

Evaluating the Performance of the Eclipse OpenJ9 JVM JIT Compiler on AArch64. - Aaron Graham; Jean-Philippe Legault; Hillary Soontiens; Julie Brown; Stephen A. MacKay; Gerhard W. Dueck; Kenneth B. Kent; Kazuhiro Konno; Daryl Maier (CCECE, 2022)

Template-based mapping of reversible circuits to IBM quantum computers. - Philipp Niemann 001; Alexandre A. A. de Almeida; Gerhard W. Dueck; Rolf Drechsler (Microprocess. Microsystems, 2022)

Java Runtime Optimization for Copying Arrays on AArch64. - Siri Sahithi Ponangi; Gerhard W. Dueck; Kenneth B. Kent; Daryl Maier; Kazuhiro Konno (MECO, 2023)