Embedded 5 V-to-3.3 V voltage regulator for supplying digital IC's in 3.3 V CMOS technology. - Gerrit W. den Besten; Bram Nauta (IEEE J. Solid State Circuits, 1998)

Applying Asynchronous Circuits in Contactless Smart Cards. - Joep L. W. Kessels; Gerrit den Besten; Ad M. G. Peeters; Torsten Kramer; Volker Timm (ASYNC, 2000)

A robust 1.5Gb/s + 3Gb/s serial PHY with feed-forward correction clock and data recovery. - William Redman-White; Martin Bugbee; Steve Dobbs; Xinyan Wu; Richard A. H. Balmford; Jonah Nuttgens; Umer Salim Kiani; Richard Clegg; Gerrit W. den Besten (ESSCIRC, 2008)

A 0.2-2 Gb/s 6x OSR Receiver Using a Digitally Self-Adaptive Equalizer. - Friedel Gerfers; Gerrit W. den Besten; Pavel V. Petkov; Jim E. Conder; Andreas J. Koellmann (IEEE J. Solid State Circuits, 2008)

A Robust High Speed Serial PHY Architecture With Feed-Forward Correction Clock and Data Recovery. - William Redman-White; Martin Bugbee; Steve Dobbs; Xinyan Wu; Richard A. H. Balmford; Jonah Nuttgens; Umer Salim Kiani; Richard Clegg; Gerrit W. den Besten (IEEE J. Solid State Circuits, 2009)

A 1.2-6 Gb/s, 4.2 pJ/bit Clock & Data Recovery circuit with high jitter tolerance in 0.14μm CMOS. - Arnoud P. van der Wel; Gerrit den Besten (ESSCIRC, 2011)

High-speed wireline transceivers and clocking. - Gerrit den Besten; Shunichi Kaeriyama (CICC, 2012)

A 1.2-6 Gb/s, 4.2 pJ/Bit Clock & Data Recovery Circuit With High Jitter Tolerance in 0.14 µm CMOS. - Arnoud P. van der Wel; Gerrit den Besten (IEEE J. Solid State Circuits, 2012)

Current-steering pre-emphasis transmitter with continuously tuned line terminations for optimum impedance match and maximum signal drive range. - Gerrit den Besten; Harold G. Hanson; Ranjeet K. Gupta (CICC, 2013)

F3: Emerging technologies for wireline communication. - Elad Alon; Azita Emami; Gerrit den Besten; Ichiro Fujimori; Tadahiro Kuroda; Masafumi Nogawa; Hisakatsu Yamaguchi (ISSCC, 2013)

Session 23 overview: Short-reach links, XCVR techniques, & PLLs. - Gerrit den Besten; Koichi Yamaguchi (ISSCC, 2013)

Session 10 overview: Advanced wireline techniques and PLLs: Wireline subcommittee. - Gerrit den Besten; Ajith Amerasekera (ISSCC, 2015)

F4: Emerging short-reach and high-density interconnect solutions for internet of everything. - Ichiro Fujimori; Martin Brox; Elad Alon; Pavan Kumar Hanumolu; Gerrit den Besten; Hideyuki Nosaka (ISSCC, 2016)

Single-Pair Automotive PHY Solutions from 10Mb/s to 10Gb/s and Beyond. - Gerrit W. den Besten (ISSCC, 2019)