Comparative Study of SRT-Dividers in FPGA. - Gustavo Sutter; Gery Bioul; Jean-Pierre Deschamps (FPL, 2004)

Power Aware Dividers in FPGA. - Gustavo Sutter; Jean-Pierre Deschamps; Gery Bioul; Eduardo I. Boemo (PATMOS, 2004)

FPGA Implementations of BCD Multipliers. - Gustavo Sutter; Elias Todorovich; Gery Bioul; Martín Vázquez 001; Jean-Pierre Deschamps (ReConFig, 2009)

Decimal Adders/Subtractors in FPGA: Efficient 6-input LUT Implementations. - Martín Vázquez 001; Gustavo Sutter; Gery Bioul; Jean-Pierre Deschamps (ReConFig, 2009)

High-Speed FPGA 10's Complement Adders-Subtractors. - Gery Bioul; Martín Vázquez 001; Jean-Pierre Deschamps; Gustavo Sutter (Int. J. Reconfigurable Comput., 2010)

Real-time speckle image processing. - Elias Todorovich; Ana Lucía Dai Pra; Lucía Isabel Passoni; Martín Vázquez 001; Ezequiel Cozzolino; Fernando Ferrara; Gery Bioul (J. Real Time Image Process., 2016)