A 1.5-V 3.2 Gb/s/pin Graphic DDR4 SDRAM With Dual-Clock System, Four-Phase Input Strobing, and Low-Jitter Fully Analog DLL. - Ki-Won Lee; Joo-Hwan Cho; Byoung-Jin Choi; Geun-Il Lee; Ho-Don Jung; Woo-Young Lee; Ki-Chon Park; Yongsuk Joo; Jaehoon Cha; Young-Jung Choi; Patrick B. Moran; Jin-Hong Ahn (IEEE J. Solid State Circuits, 2007)

A 16Gb/s/pin 8Gb GDDR6 DRAM with bandwidth extension techniques for high-speed applications. - Kyu-Dong Hwang; Boram Kim; Sang-Yeon Byeon; Kyu-Young Kim; Dae-Han Kwon; Hyun-Bae Lee; Geun-Il Lee; Sang-Sic Yoon; Jin-Youp Cha; Soo-Young Jang; Seung-Hun Lee; Yongsuk Joo; et al. (ISSCC, 2018)