Analysis of VCO jitter in chip-package co-design. - H. Parthasarathy; Ghanshyam Nayak; Ponnathpur R. Mukund (ISCAS (3), 2002)

LNA design optimization with reference to ESD protection circuitry. - S. Sridharan; Ghanshyam Nayak; P. R. Mukund (ISCAS (1), 2003)

DREAM: A Chip-Package Co-Design Tool for RF-Mixed Signal Systems. - Ghanshyam Nayak; Tejasvi Das; T. M. Rao; P. R. Mukund (ISVLSI, 2004)

A generic macromodel for coupling between inductors and interconnects for R.F.I.C. layouts. - Tejasvi Das; Ghanshyam Nayak; Ponnathpur R. Mukund (SoCC, 2004)

Chip Package Co-Design of a Heterogeneously Integrated 2.45GHz CMOS VCO using Embedded Passives in a Silicon Package. - Ghanshyam Nayak; P. R. Mukund (VLSI Design, 2004)

System in a Package Design of a RF Front End System Using Application Specific Reduced Order Models. - Ghanshyam Nayak; Clyde Washburn; P. R. Mukund (VLSI Design, 2005)