Multiple Word-Length High-Level Synthesis. - Philippe Coussy; Ghizlane Lhairech-Lebreton; Dominique Heller (EURASIP J. Embed. Syst., 2008)

Hierarchical and Multiple-Clock Domain High-Level Synthesis for Low-Power Design on FPGA. - Ghizlane Lhairech-Lebreton; Philippe Coussy; Eric Martin 001 (FPL, 2010)

Bitwidth-aware high-level synthesis for designing low-power DSP applications. - Ghizlane Lhairech-Lebreton; Philippe Coussy; Dominique Heller; Eric Martin 001 (ICECS, 2010)