ZyON: Enabling Spike Sorting on APSoC-Based Signal Processors for High-Density Microelectrode Arrays. - Gianluca Leone; Luigi Raffo; Paolo Meloni (IEEE Access, 2020)

A Bandwidth-Efficient Emulator of Biologically-Relevant Spiking Neural Networks on FPGA. - Gianluca Leone; Luigi Raffo; Paolo Meloni (IEEE Access, 2022)

On-FPGA Spiking Neural Networks for Multi-variable End-to-End Neural Decoding. - Gianluca Leone; Luca Martis; Luigi Raffo; Paolo Meloni (ARC, 2023)

Spiking Neural Networks for Integrated Reach-to-Grasp Decoding on FPGAs. - Gianluca Leone; Luca Martis; Luigi Raffo; Paolo Meloni (BioCAS, 2023)

On-FPGA Spiking Neural Networks for End-to-End Neural Decoding. - Gianluca Leone; Luigi Raffo; Paolo Meloni (IEEE Access, 2023)

Exploiting FPGAs and Spiking Neural Networks at the Micro-Edge: The EdgeAI Approach. - Paolo Meloni; Paola Busia; Gianluca Leone; Luca Martis; Matteo Antonio Scrugli (ARC, 2024)

Spiking Neural Networks for Near-Sensor Processing: An Open-Hardware Experience. - Luca Martis; Gianluca Leone; Luigi Raffo; Paolo Meloni (CPS Summer School, PhD Workshop, 2024)

sEMG-Based Gesture Recognition with Spiking Neural Networks on Low-Power FPGA. - Matteo Antonio Scrugli; Gianluca Leone; Paola Busia; Paolo Meloni (DASIP, 2024)

On-FPGA Spiking Neural Networks for Integrated Near-Sensor ECG Analysis. - Matteo Antonio Scrugli; Paola Busia; Gianluca Leone; Paolo Meloni (DATE, 2024)

SYNtzulA: Open-Source Hardware for Energy-Efficient Spiking Neural Network Inference. - Luca Martis; Gianluca Leone; Luigi Raffo; Paolo Meloni (CF (Companion), 2025)

Enabling SNN-Based Near-MEA Neural Decoding with Channel Selection: An Open-HW Approach. - Gianluca Leone; Luca Martis; Luigi Raffo; Paolo Meloni (DATE, 2025)

Real-Time sEMG Processing With Spiking Neural Networks on a Low-Power 5K-LUT FPGA. - Matteo Antonio Scrugli; Gianluca Leone; Paola Busia; Luigi Raffo; Paolo Meloni (IEEE Trans. Biomed. Circuits Syst., 2025)

SYNtzulu: A Tiny RISC-V-Controlled SNN Processor for Real-Time Sensor Data Analysis on Low-Power FPGAs. - Gianluca Leone; Matteo Antonio Scrugli; Lorenzo Badas; Luca Martis; Luigi Raffo; Paolo Meloni (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)