Two approaches for developing generic components in VHDL. - Vytautas Stuikys; Giedrius Ziberkas; Robertas Damasevicius; Giedrius Majauskas (DATE, 2001)

Soft IP Design Framework Using Metaprogramming Techniques. - Vytautas Stuikys; Robertas Damasevicius; Giedrius Ziberkas; Giedrius Majauskas (DIPES, 2002)

Application of design patterns for hardware design. - Robertas Damasevicius; Giedrius Majauskas; Vytautas Stuikys (DAC, 2003)

An Efficient Architecture for the Implementation of Message Passing Programming Model on Massive Multiprocessor. - Ferid Gharsalli; Amer Baghdadi; Marius Bonaciu; Giedrius Majauskas; Wander O. Cesário; Ahmed Amine Jerraya (IEEE International Workshop on Rapid System Prototyping, 2004)