The iFlow design factory infrastructure for a 17M-gate, 0.13μm, 333MHz design [SoC design]. - Gilles-Eric Descamps; Satish Bagalkotkar (CICC, 2003)

Design of a 17-million gate network processor using a design factory. - Gilles-Eric Descamps; Satish Bagalkotkar; Subramaniam Ganesan; Satish Iyengar; Alain Pirson (DAC, 2003)

The iFlow Design Factory: Evolving Chip Design from an Art to a Process, through Adaptive Resource Management, and Qualified Data Exchange. - Gilles-Eric Descamps; Satish Bagalkotkar; Subramaniam Ganesan; Sridhar Subramaniam; Hem Hingarh (ISQED, 2003)