Digital Circuit Design Based on the Resonant-Tunneling-Hetero-Junction-Bipolar-Transistor. - Peter Glösekötter; Christian Pacha; Karl F. Goser; Gilson I. Wirth; Werner Prost; Uwe Auer; M. Agethen; P. Velling; Franz-Josef Tegude (SBCCI, 2000)

Evaluating fault coverage of bulk built-in current sensor for soft errors in combinational and sequential logic. - Egas Henes Neto; Ivandro Ribeiro; Michele G. Vieira; Gilson I. Wirth; Fernanda Lima Kastensmidt (SBCCI, 2005)

Single event transients in combinatorial circuits. - Gilson I. Wirth; Michele G. Vieira; Egas Henes Neto; Fernanda Gusmão de Lima Kastensmidt (SBCCI, 2005)

Generation and Propagation of Single Event Transients in CMOS Circuits. - Gilson I. Wirth; Michele G. Vieira; Egas Henes Neto; Fernanda Gusmão de Lima Kastensmidt (DDECS, 2006)

Single event transients in dynamic logic. - Gilson I. Wirth; Ivandro Ribeiro; Michele G. Vieira; Fernanda Gusmão de Lima Kastensmidt (SBCCI, 2006)

Using Bulk Built-in Current Sensors to Detect Soft Errors. - Egas Henes Neto; Ivandro Ribeiro; Michele G. Vieira; Gilson I. Wirth; Fernanda Lima Kastensmidt (IEEE Micro, 2006)

Impact of Noise on Trim Circuits for Bandgap Voltage References. - Dalton Martini Colombo; Gilson Inácio Wirth; Sergio Bampi; Christian Jesús B. Fayomi (ICECS, 2007)

The Bulk Built In Current Sensor Approach for Single Event Transient Detection. - Gilson I. Wirth; Christian Fayomi (SoC, 2007)

Yield Analysis by Error Propagation Using Numerical Derivatives Considering WD and D2D variations. - Lucas Brusamarello; Roberto da Silva; Ricardo A. L. Reis; Gilson I. Wirth (ISVLSI, 2007)

Using built-in sensors to cope with long duration transient faults in future technologies. - Carlos Arthur Lang Lisbôa; Fernanda Lima Kastensmidt; Egas Henes Neto; Gilson I. Wirth; Luigi Carro (ITC, 2007)

Trim range limited by noise in bandgap voltage references. - Dalton M. Colombo; Gilson I. Wirth; Sergio Bampi (SBCCI, 2007)

A built-in current sensor for high speed soft errors detection robust to process and temperature variations. - Egas Henes Neto; Fernanda Lima Kastensmidt; Gilson I. Wirth (SBCCI, 2007)

Obtaining delay distribution of dynamic logic circuits by error propagation at the electrical level. - Lucas Brusamarello; Roberto da Silva; Gilson I. Wirth; Ricardo A. L. Reis (VLSI-SoC, 2007)

Statistical and Numerical Approach for a Computer efficient circuit yield analysis. - Lucas Brusamarello; Roberto da Silva; Gilson I. Wirth; Ricardo Reis 001 (VLSI-SoC (Selected Papers), 2007)

Statistical analysis of systematic and random variability of flip-flop race immunity in 130nm and 90nm CMOS technologies. - Gustavo Neuberger; Fernanda Gusmão de Lima Kastensmidt; Ricardo Reis 001; Gilson I. Wirth; Ralf Brederlow; Christian Pacha (VLSI-SoC, 2007)

Statistical Analysis of Normality of Systematic and Random Variability of Flip-Flop Race Immunity in 130nm and 90nm CMOS Technologies. - Gustavo Neuberger; Gilson I. Wirth; Fernanda Gusmão de Lima Kastensmidt; Ricardo Reis 001 (VLSI-SoC (Selected Papers), 2007)

Accurate and computer efficient modelling of single event transients in CMOS circuits. - Gilson I. Wirth; Michele G. Vieira; Fernanda Gusmão de Lima Kastensmidt (IET Circuits Devices Syst., 2007)

Técnicas probabilísticas para análise de yield em nível elétrico usando propagação de erros e derivadas numéricas. - Lucas Brusamarello; Roberto da Silva; Gilson I. Wirth; Ricardo Augusto da Luz Reis (RITA, 2007)

"The flipped voltage follower"-based low voltage fully differential CMOS sample-and-hold circuit. - Christian Jesús B. Fayomi; Gilson I. Wirth; Jaime Ramírez-Angulo; Akira Matsuzawa (ISCAS, 2008)

Device degradation and resilient computing. - Peter Glösekötter; Ulrich Greveler; Gilson I. Wirth (ISCAS, 2008)

Mitigating Soft Errors in SRAM Address Decoders Using Built-in Current Sensors. - Egas Henes Neto; Gilson I. Wirth; Fernanda Lima Kastensmidt (J. Electron. Test., 2008)

Bulk built in current sensors for single event transient detection in deep-submicron technologies. - Gilson I. Wirth (Microelectron. Reliab., 2008)

Modeling the sensitivity of CMOS circuits to radiation induced single event transients. - Gilson I. Wirth; Michele G. Vieira; Egas Henes Neto; Fernanda Lima Kastensmidt (Microelectron. Reliab., 2008)

Probabilistic Approach for Yield Analysis of Dynamic Logic Circuits. - Lucas Brusamarello; Roberto da Silva; Gilson I. Wirth; Ricardo A. L. Reis (IEEE Trans. Circuits Syst. I Regul. Pap., 2008)

An experimental 0.6-V 57.5-fJ/conversion-step 250-kS/s 8-bit rail-to-rail successive approximation ADC in 0.18µm CMOS. - Christian Jesús B. Fayomi; Gilson I. Wirth; David M. Binkley; Akira Matsuzawa (ICECS, 2009)

Measuring the effectiveness of symmetric and asymmetric transistor sizing for Single Event Transient mitigation in CMOS 90nm technologies. - Thiago Assis; Fernanda Lima Kastensmidt; Gilson I. Wirth; Ricardo Reis 001 (LATW, 2009)

Using Bulk Built-In Current Sensors and recomputing techniques to mitigate transient faults in microprocessors. - Franco Leite; Tiago R. Balen; Marcos Hervé; Marcelo Lubaszewski; Gilson I. Wirth (LATW, 2009)

NBTI-aware technique for transistor sizing of high-performance CMOS gates. - Maurício Banaszeski da Silva; Vinicius V. A. Camargo; Lucas Brusamarello; Gilson I. Wirth; Roberto da Silva (LATW, 2009)

Protecting digital circuits against hold time violation due to process variability. - Gustavo Neuberger; Gilson I. Wirth; Ricardo Reis 001 (SBCCI, 2009)

Statistical RTS model for digital circuits. - Lucas Brusamarello; Gilson I. Wirth; Roberto da Silva (Microelectron. Reliab., 2009)

Design methodology using inversion coefficient for low-voltage low-power CMOS voltage reference. - Dalton Martini Colombo; Gilson Inácio Wirth; Christian Jesús B. Fayomi (SBCCI, 2010)

Modeling the impact of RTS on the reliability of ring oscillators. - Maurício Banaszeski da Silva; Gilson I. Wirth (SBCCI, 2010)

Semiconductor nanoparticles for electronic device integration on foils. - Ulrich Hilleringmann; K. Wolff; F. Assion; Fábio Fedrizzi Vidor; Gilson I. Wirth (AFRICON, 2011)

Statistical characterization of standard cells using design of experiments with response surface modeling. - Miguel Miranda; Philippe Roussel; Lucas Brusamarello; Gilson I. Wirth (DAC, 2011)

Fast and accurate statistical characterization of standard cell libraries. - Lucas Brusamarello; Gilson I. Wirth; Philippe Roussel; Miguel Miranda (Microelectron. Reliab., 2011)

A PLL for clock generation with automatic frequency control under TID effects. - Ricardo Vanni Dallasen; Gilson Inácio Wirth; Thiago Hanna Both (SBCCI, 2012)

Compact modeling and simulation of Random Telegraph Noise under non-stationary conditions in the presence of random dopants. - Gilson I. Wirth; Dragica Vasileska; N. Ashraf; Lucas Brusamarello; R. Della Giustina; P. Srinivasan 002 (Microelectron. Reliab., 2012)

Voltage reference design using 1 V power supply in 0.13 µm CMOS technology. - Dalton M. Colombo; Gilson I. Wirth; Sergio Bampi; P. Srinivasan 002 (LASCAS, 2013)

Aging and voltage scaling impacts under neutron-induced soft error rate in SRAM-based FPGAs. - Fernanda Lima Kastensmidt; Jorge L. Tonfat; Thiago Hanna Both; Paolo Rech; Gilson I. Wirth; Ricardo Reis 001; Florent Bruguier; Pascal Benoit; Lionel Torres; Christopher Frost 002 (ETS, 2014)

The effects of total ionizing dose on the neutron SEU cross section of a 130 nm 4 Mb SRAM memory. - Evaldo Carlos Fonseca Pereira; Odair Lelis Goncalez; Rafael Galhardo Vaz; Claudio Antonio Federico; Thiago Hanna Both; Gilson Inácio Wirth (LATW, 2014)

Performance analysis of a clock generator PLL under TID effects. - Alan Carlos Junior Rossetto; Gilson Inácio Wirth; Ricardo Vanni Dallasen (LATW, 2014)

Circuit simulation of workload-dependent RTN and BTI based on trap kinetics. - Vinicius V. A. Camargo; Ben Kaczer; Tibor Grasser; Gilson I. Wirth (Microelectron. Reliab., 2014)

Voltage scaling and aging effects on soft error rate in SRAM-based FPGAs. - Fernanda Lima Kastensmidt; Jorge L. Tonfat; Thiago Hanna Both; Paolo Rech; Gilson I. Wirth; Ricardo Reis 001; Florent Bruguier; Pascal Benoit; Lionel Torres; Christopher Frost 002 (Microelectron. Reliab., 2014)

Low temperature fabrication of a ZnO nanoparticle thin-film transistor suitable for flexible electronics. - Fábio Fedrizzi Vidor; Gilson I. Wirth; Ulrich Hilleringmann (Microelectron. Reliab., 2014)

Use of SSTA Tools for Evaluating BTI Impact on Combinational Circuits. - Vinicius V. A. Camargo; Ben Kaczer; Gilson I. Wirth; Tibor Grasser; Guido Groeseneken (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Impact of dynamic voltage scaling and thermal factors on FinFET-based SRAM reliability. - Felipe Rosa 001; Raphael Martins Brum; Gilson I. Wirth; Luciano Ost; Ricardo Reis 001 (ICECS, 2015)

Techniques for square ELT simulation: A comparative study. - Pablo Ilha Vaz; Alberto Wiltgen Junior; Gilson Inácio Wirth (LASCAS, 2015)

Impact of Total Ionizing Dose on Bulk Built-In Current Sensors with Dynamic Storage Cell. - Alexandre Simionovski; Rafael Galhardo Vaz; Odair Lelis Goncalez; Gilson I. Wirth (J. Electron. Test., 2015)

Impact of dynamic voltage scaling and thermal factors on SRAM reliability. - Felipe Rosa 001; Raphael Martins Brum; Gilson I. Wirth; Fernanda Gusmão de Lima Kastensmidt; Luciano Ost; Ricardo Reis 001 (Microelectron. Reliab., 2015)

Adding a self-reset feature to the Bulk-BICS with dynamic storage cell. - Alexandre Simionovski; Gilson I. Wirth (Microelectron. Reliab., 2015)

MagPDK: An open-source process design kit for circuit design with magnetic tunnel junctions. - Raphael Martins Brum; Gilson I. Wirth (SBCCI, 2016)

Rail to rail radiation hardened operational amplifier in standard CMOS technology with standard layout techniques. - Peterson R. Agostinho; Odair Lelis Goncalez; Gilson I. Wirth (Microelectron. Reliab., 2016)

Self-aligned ZnO nanoparticle-based TFTs for flexible electronics. - Fábio Fedrizzi Vidor; Gilson I. Wirth; Thorsten Meyers; Julia Reker; Ulrich Hilleringmann (AFRICON, 2017)

Time domain electrical characterization in zinc oxide nanoparticle thin-film transistors. - Thales E. Becker; Fábio Fedrizzi Vidor; Gilson I. Wirth; Thorsten Meyers; Julia Reker; Ulrich Hilleringmann (LATS, 2018)

Design Flow Methodology for Radiation Hardened by Design CMOS Enclosed-Layout-Transistor-Based Standard-Cell Library. - Pablo Ilha Vaz; Thiago Hanna Both; Fábio Fedrizzi Vidor; Raphael Martins Brum; Gilson I. Wirth (J. Electron. Test., 2018)

A TCAD evaluation of a single Bulk-BICS with integrative memory cell. - Alexandre Simionovski; Gilson I. Wirth; Ronald D. Schrimpf; Bharat L. Bhuva (Microelectron. J., 2018)

Modeling and simulation of the charge trapping component of BTI and RTS. - Thiago Hanna Both; Gabriela Firpo Furtado; Gilson Inácio Wirth (Microelectron. Reliab., 2018)

TID effects on I-V characteristics of bulk CMOS STD and ELT-based devices in 600 nm. - Pablo Ilha Vaz; Gilson I. Wirth; Fábio Fedrizzi Vidor; Thiago Hanna Both (Microelectron. J., 2020)

Modeling and Simulation of Charge Trapping in 1/f Noise, RTN and BTI: from Devices to Circuits. - Gilson I. Wirth (MIXDES, 2021)

Random Telegraph Noise in Analog CMOS Circuits. - Maurício Banaszeski da Silva; Gilson I. Wirth; Hans P. Tuinhout; Adrie Zegers-van Duijnhoven; Andries J. Scholten (IEEE Trans. Circuits Syst. I Regul. Pap., 2023)

Jitter Due to Random Telegraph Noise in Voltage-Controlled Oscillators Based on Ring Oscillators. - Caroline P. Garcia; Bernardo Lourosa; Gilson I. Wirth (LASCAS, 2025)

Impact of Observation Time Window on RTN-Induced Jitter in CMOS Ring Oscillators. - Gilson I. Wirth; Caroline P. Garcia; Guillermo L. Nogueira (IEEE Access, 2025)

Modeling and Predicting Noise-Induced Failure Rates in Ultra-Low-Voltage SRAM Bitcells Affected by Process Variations. - Léopold Van Brandt; Michele Bonnin; Maurício Banaszeski da Silva; Pascal Bolcato; Gilson I. Wirth; Denis Flandre; Jean-Charles Delvenne (IEEE Trans. Circuits Syst. I Regul. Pap., 2025)