An effective distributed BIST architecture for RAMs. - Monica Lobetti Bodoni; Alfredo Benso; Silvia Chiusano; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ETW, 2000)

A Family of Self-Repair SRAM Cores. - Alfredo Benso; Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (IOLTW, 2000)

A programmable BIST architecture for clusters of multiple-port SRAMs. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (ITC, 2000)

Memory Read Faults: Taxonomy and Automatic Test Generation. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (Asian Test Symposium, 2001)

Control-Flow Checking via Regular Expressions. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Luca Tagliaferri (Asian Test Symposium, 2001)

SEU effect analysis in an open-source router via a distributed fault injection environment. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DATE, 2001)

Validation of a Software Dependability Tool via Fault Injection Experiments. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Luca Tagliaferri; Paolo Prinetto (IOLTW, 2001)

GRAAL: a tool for highly dependable SRAMs generation. - Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto; Franco Bigongiari (ITC, 2001)

Online and Offline BIST in IP-Core Design. - Alfredo Benso; Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (IEEE Des. Test Comput., 2001)

Specification and Design of a New Memory Fault Simulator. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (Asian Test Symposium, 2002)

An Optimal Algorithm for the Automatic Generation of March Tests. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DATE, 2002)

Static Analysis of SEU Effects on Software Applications. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ITC, 2002)

An on-line BIST RAM architecture with self-repair capabilities. - Alfredo Benso; Silvia Chiusano; Giorgio Di Natale; Paolo Prinetto (IEEE Trans. Reliab., 2002)

Exhaustive Test of Several Dependable Memory Architectures Designed by GRAAL Tool. - Fabrizio Bertuccelli; Franco Bigongiari; Andrea S. Brogna; Giorgio Di Natale; Paolo Prinetto; Roberto Saletti (Asian Test Symposium, 2003)

A Watchdog Processor to Detect Data and Control Flow Errors. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IOLTS, 2003)

FAUST: FAUlt-injection Script-based Tool. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; I. Solcia; Luca Tagliaferri (IOLTS, 2003)

Data Critically Estimation In Software Applications. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Luca Tagliaferri (ITC, 2003)

Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto; Monica Lobetti Bodoni (IEEE Commun. Mag., 2003)

Online Self-Repair of FIR Filters. - Alfredo Benso; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IEEE Des. Test Comput., 2003)

Software-implemented system dependability for safety critical applications. - Giorgio Di Natale (2003)

Automatic March tests generation for static and dynamic faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ETS, 2005)

March AB, March AB1: new March tests for unlinked dynamic memory faults. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ITC, 2005)

Memory Fault Simulator for Static-Linked Faults. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ATS, 2006)

ATPG for Dynamic Burn-In Test in Full-Scan Circuits. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ATS, 2006)

Automatic march tests generations for static linked faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DATE, 2006)

A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DDECS, 2006)

Automatic March Tests Generation for Multi-Port SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (DELTA, 2006)

A 22n March Test for Realistic Static Linked Faults in SRAMs. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (ETS, 2006)

Single-Event Upset Analysis and Protection in High Speed Circuits. - Mohammad Hosseinabady; Pejman Lotfi-Kamran; Giorgio Di Natale; Stefano Di Carlo; Alfredo Benso; Paolo Prinetto (ETS, 2006)

A Novel Parity Bit Scheme for SBox in AES Circuits. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (DDECS, 2007)

Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC. - Mohammad Hosseinabady; Mohammad Hossein Neishaburi; Zainalabedin Navabi; Alfredo Benso; Stefano Di Carlo; Paolo Prinetto; Giorgio Di Natale (IOLTS, 2007)

An On-Line Fault Detection Scheme for SBoxes in Secure Circuits. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IOLTS, 2007)

A Dependable Parallel Architecture for SBoxes. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (ReCoSoC, 2007)

March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs. - Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IET Comput. Digit. Tech., 2007)

LIFTING: A Flexible Open-Source Fault Simulator. - Alberto Bosio; Giorgio Di Natale (ATS, 2008)

On-Line Instruction-Checking in Pipelined Microprocessors. - Stefano Di Carlo; Giorgio Di Natale; Riccardo Mariani (ATS, 2008)

An Integrated Validation Environment for Differential Power Analysis. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (DELTA, 2008)

A Reliable Architecture for the Advanced Encryption Standard. - Giorgio Di Natale; M. Doulcier; Marie-Lise Flottes; Bruno Rouzeyre (ETS, 2008)

A Modular Memory BIST for Optimized Memory Repair. - Philipp Öhler; Alberto Bosio; Giorgio Di Natale; Sybille Hellebrand (IOLTS, 2008)

March Test Generation Revealed. - Alfredo Benso; Alberto Bosio; Stefano Di Carlo; Giorgio Di Natale; Paolo Prinetto (IEEE Trans. Computers, 2008)

Execution time reduction of Differential Power Analysis experiments. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (LATW, 2009)

A Reliable Architecture for Parallel Implementations of the Advanced Encryption Standard. - Giorgio Di Natale; M. Doulcier; Marie-Lise Flottes; Bruno Rouzeyre (J. Electron. Test., 2009)

Ensuring high testability without degrading security: Embedded tutorial on "test and security". - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (DDECS, 2010)

Evaluation of Resistance to Differential Power Analysis: Execution Time Optimizations for Designers. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (DELTA, 2010)

Evaluation of concurrent error detection techniques on the Advanced Encryption Standard. - Kaouthar Bousselam; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (ETS, 2010)

Self-Test Techniques for Crypto-Devices. - Giorgio Di Natale; M. Doulcier; Marie-Lise Flottes; Bruno Rouzeyre (IEEE Trans. Very Large Scale Integr. Syst., 2010)

Power consumption traces realignment to improve differential power analysis. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Miroslav Valka; Denis Réal (DDECS, 2011)

A New Bulk Built-In Current Sensor-Based Strategy for Dealing with Long-Duration Transient Faults in Deep-Submicron Technologies. - Rodrigo Possamai Bastos; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (DFT, 2011)

Scan Attacks and Countermeasures in Presence of Scan Response Compactors. - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (ETS, 2011)

New security threats against chips containing scan chain structures. - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (HOST, 2011)

Timing issues for an efficient use of concurrent error detection codes. - Rodrigo Possamai Bastos; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (LATW, 2011)

A New Scan Attack on RSA in Presence of Industrial Countermeasures. - Jean DaRolt; Amitabh Das; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Ingrid Verbauwhede (COSADE, 2012)

A scan-based attack on Elliptic Curve Cryptosystems in presence of industrial Design-for-Testability structures. - Jean DaRolt; Amitabh Das; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Ingrid Verbauwhede (DFT, 2012)

On-chip test comparison for protecting confidential data in secure ICs. - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (ETS, 2012)

Are advanced DfT structures sufficient for preventing scan-attacks? - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (VTS, 2012)

Scan attacks on side-channel and fault attack resistant public-key implementations. - Jean DaRolt; Amitabh Das; Santosh Ghosh; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Ingrid Verbauwhede (J. Cryptogr. Eng., 2012)

Novel transient-fault detection circuit featuring enhanced bulk built-in current sensor with low-power sleep-mode. - Rodrigo Possamai Bastos; Frank Sill Torres; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (Microelectron. Reliab., 2012)

Statistical Reliability Estimation of Microprocessor-Based Systems. - Alessandro Savino; Stefano Di Carlo; Gianfranco Politano; Alfredo Benso; Alberto Bosio; Giorgio Di Natale (IEEE Trans. Computers, 2012)

On Countermeasures Against Fault Attacks on the Advanced Encryption Standard. - Kaouthar Bousselam; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (Fault Analysis in Cryptography, 2012)

Laser-Induced Fault Simulation. - Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (DSD, 2013)

A bulk built-in sensor for detection of fault attacks. - Rodrigo Possamai Bastos; Frank Sill Torres; Jean-Max Dutertre; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (HOST, 2013)

A BIST method for TSVs pre-bond test. - Hakim Zimouche; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IDT, 2013)

A smart test controller for scan chains in secure circuits. - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IOLTS, 2013)

A 3D IC BIST for pre-bond test of TSVs using ring oscillators. - Yassine Fkih; Pascal Vivet; Bruno Rouzeyre; Marie-Lise Flottes; Giorgio Di Natale (NEWCAS, 2013)

A single built-in sensor to check pull-up and pull-down CMOS networks against transient faults. - Rodrigo Possamai Bastos; Frank Sill Torres; Jean-Max Dutertre; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (PATMOS, 2013)

A New Recovery Scheme Against Short-to-Long Duration Transient Faults in Combinational Logic. - Rodrigo Possamai Bastos; Giorgio Di Natale; Marie-Lise Flottes; Feng Lu; Bruno Rouzeyre (J. Electron. Test., 2013)

Secure JTAG Implementation Using Schnorr Protocol. - Amitabh Das; Jean DaRolt; Santosh Ghosh; Stefaan Seys; Sophie Dupuis; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Ingrid Verbauwhede (J. Electron. Test., 2013)

On the Effectiveness of Hardware Trojan Horse Detection via Side-Channel Analysis. - Sophie Dupuis; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (Inf. Secur. J. A Glob. Perspect., 2013)

Multilevel Ionizing-Induced Transient Fault Simulator. - Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (Inf. Secur. J. A Glob. Perspect., 2013)

TRUDEVICE: A COST Action on Trustworthy Manufacturing and Utilization of Secure Devices. - Giorgio Di Natale (Inf. Secur. J. A Glob. Perspect., 2013)

Sensitivity tuning of a bulk built-in current sensor for optimal transient-fault detection. - Jean-Max Dutertre; Rodrigo Possamai Bastos; Olivier Potin; Marie-Lise Flottes; Bruno Rouzeyre; Giorgio Di Natale (Microelectron. Reliab., 2013)

A novel differential scan attack on advanced DFT structures. - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (ACM Trans. Design Autom. Electr. Syst., 2013)

Testing PUF-based secure key storage circuits. - Mafalda Cortez; Gijs Roelofs; Said Hamdioui; Giorgio Di Natale (DATE, 2014)

Hacking and protecting IC hardware. - Said Hamdioui; Jean-Luc Danger; Giorgio Di Natale; Fethulah Smailbegovic; Gerard van Battum; Mark Tehranipoor (DATE, 2014)

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum. - Stefano Di Carlo; Alessandro Vallero; Dimitris Gizopoulos; Giorgio Di Natale; Arnaud Grasset; Riccardo Mariani; Frank Reichenbach (DSD, 2014)

Laser attacks on integrated circuits: From CMOS to FD-SOI. - Jean-Max Dutertre; Stephan De Castro; Alexandre Sarafianos; Noemie Boher; Bruno Rouzeyre; Mathieu Lisart; Joel Damiens; Philippe Candelier; Marie-Lise Flottes; Giorgio Di Natale (DTIS, 2014)

A survey on simulation-based fault injection tools for complex systems. - Maha Kooli; Giorgio Di Natale (DTIS, 2014)

Layout-aware laser fault injection simulation and modeling: From physical level to gate level. - Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Guillaume Hubert (DTIS, 2014)

DTIS 2014 foreword. - Ioannis Voyiatzis; Michel Renovell; Mohamed Masmoudi; Paolo Prinetto; Giorgio Di Natale (DTIS, 2014)

A novel adaptive fault tolerant flip-flop architecture based on TMR. - Luca Cassano; Alberto Bosio; Giorgio Di Natale (ETS, 2014)

Cross-layer early reliability evaluation: Challenges and promises. - Stefano Di Carlo; Alessandro Vallero; Dimitris Gizopoulos; Giorgio Di Natale; Antonio González 001; Ramon Canal; Riccardo Mariani; M. Pipponzi; Arnaud Grasset; Philippe Bonnot 001; Frank Reichenbach; Gulzaib Rafiq; et al. (IOLTS, 2014)

A novel hardware logic encryption technique for thwarting illegal overproduction and Hardware Trojans. - Sophie Dupuis; Papa-Sidi Ba; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IOLTS, 2014)

Customized cell detector for laser-induced-fault detection. - Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IOLTS, 2014)

2D to 3D Test Pattern Retargeting Using IEEE P1687 Based 3D DFT Architectures. - Yassine Fkih; Pascal Vivet; Bruno Rouzeyre; Marie-Lise Flottes; Giorgio Di Natale; Juergen Schloeffel (ISVLSI, 2014)

Fault injection tools based on Virtual Machines. - Maha Kooli; Pascal Benoit; Giorgio Di Natale; Lionel Torres; Volkmar Sieh (ReCoSoC, 2014)

Laser-Induced Fault Effects in Security-Dedicated Circuits. - Vincent Beroulle; Philippe Candelier; Stephan De Castro; Giorgio Di Natale; Jean-Max Dutertre; Marie-Lise Flottes; David Hély; Guillaume Hubert; Régis Leveugle; Feng Lu; Paolo Maistri; Athanasios Papadimitriou; et al. (VLSI-SoC (Selected Papers), 2014)

Laser-induced fault effects in security-dedicated circuits. - Régis Leveugle; Paolo Maistri; Pierre Vanhauwaert; Feng Lu; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Athanasios Papadimitriou; David Hély; Vincent Beroulle; Guillaume Hubert; Stephan De Castro; et al. (VLSI-SoC, 2014)

Built-in self-test for manufacturing TSV defects before bonding. - Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Hakim Zimouche (VTS, 2014)

Testing Methods for PUF-Based Secure Key Storage Circuits. - Mafalda Cortez; Gijs Roelofs; Said Hamdioui; Giorgio Di Natale (J. Electron. Test., 2014)

Improving the ability of Bulk Built-In Current Sensors to detect Single Event Effects by using triple-well CMOS. - Jean-Max Dutertre; Rodrigo Possamai Bastos; Olivier Potin; Marie-Lise Flottes; Bruno Rouzeyre; Giorgio Di Natale; Alexandre Sarafianos (Microelectron. Reliab., 2014)

Test Versus Security: Past and Present. - Jean DaRolt; Amitabh Das; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Ingrid Verbauwhede (IEEE Trans. Emerg. Top. Comput., 2014)

Thwarting Scan-Based Attacks on Secure-ICs With On-Chip Comparison. - Jean DaRolt; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IEEE Trans. Very Large Scale Integr. Syst., 2014)

New testing procedure for finding insertion sites of stealthy hardware trojans. - Sophie Dupuis; Papa-Sidi Ba; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (DATE, 2015)

STT MRAM-Based PUFs. - Elena-Ioana Vatajelu; Giorgio Di Natale; Marco Indaco; Paolo Prinetto (DATE, 2015)

DTIS 2015 foreword. - Paolo Prinetto; Giorgio Di Natale (DTIS, 2015)

Hardware Trojan prevention using layout-level design approach. - Papa-Sidi Ba; Palanichamy Manikandan; Sophie Dupuis; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (ECCTD, 2015)

Session-less based thermal-aware 3D-SIC test scheduling. - Marie-Lise Flottes; Joao Azevedo; Giorgio Di Natale; Bruno Rouzeyre (ETS, 2015)

Challenges in designing trustworthy cryptographic co-processors. - Ricardo Chaves; Giorgio Di Natale; Lejla Batina; Shivam Bhasin; Baris Ege; Apostolos P. Fournaris; Nele Mentens; Stjepan Picek; Francesco Regazzoni 001; Vladimir Rozic; Nicolas Sklavos 001; Bohan Yang 001 (ISCAS, 2015)

Figure of Merits of 28nm Si Technologies for Implementing Laser Attack Resistant Security Dedicated Circuits. - Stephan De Castro; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre; Jean-Max Dutertre (ISVLSI, 2015)

3D DFT Challenges and Solutions. - Yassine Fkih; Pascal Vivet; Marie-Lise Flottes; Bruno Rouzeyre; Giorgio Di Natale; Juergen Schloeffel (ISVLSI, 2015)

Digital Right Management for IP Protection. - Jérôme Rampon; Renaud Perillat; Lionel Torres; Pascal Benoit; Giorgio Di Natale; Mario Barbareschi (ISVLSI, 2015)

STT-MRAM-Based Strong PUF Architecture. - Elena-Ioana Vatajelu; Giorgio Di Natale; Lionel Torres; Paolo Prinetto (ISVLSI, 2015)

Cross-layer reliability evaluation, moving from the hardware architecture to the system level: A CLERECO EU project overview. - Alessandro Vallero; Sotiris Tselonis; Nikos Foutris; Manolis Kaliorakis; Maha Kooli; Alessandro Savino; Gianfranco Politano; Alberto Bosio; Giorgio Di Natale; Dimitris Gizopoulos; Stefano Di Carlo (Microprocess. Microsystems, 2015)

Towards a highly reliable SRAM-based PUFs. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (DATE, 2016)

System-level reliability evaluation through cache-aware software-based fault injection. - Firas Kaddachi; Maha Kooli; Giorgio Di Natale; Alberto Bosio; Mojtaba Ebrahimi; Mehdi Baradaran Tahoori (DDECS, 2016)

SEcube™: An open-source security platform in a single SoC. - Antonio Varriale; Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto; Pascal Trotta; Tiziana Margaria (DTIS, 2016)

ETS 2016 foreword. - Said Hamdioui; Giorgio Di Natale; Bram Kruseman; Maria K. Michael; Haralampos-G. D. Stratigopoulos (ETS, 2016)

Revisiting software-based soft error mitigation techniques via accurate error generation and propagation models. - Mojtaba Ebrahimi; Maryam Rashvand; Firas Kaddachi; Mehdi Baradaran Tahoori; Giorgio Di Natale (IOLTS, 2016)

Cache-aware reliability evaluation through LLVM-based analysis and fault injection. - Maha Kooli; Giorgio Di Natale; Alberto Bosio (IOLTS, 2016)

STT-MTJ-based TRNG with on-the-fly temperature/current variation compensation. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (IOLTS, 2016)

Hardware Trust through Layout Filling: A Hardware Trojan Prevention Technique. - Papa-Sidi Ba; Sophie Dupuis; Palanichamy Manikandan; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (ISVLSI, 2016)

Cross-layer system reliability assessment framework for hardware faults. - Alessandro Vallero; Alessandro Savino; Gianfranco Politano; Stefano Di Carlo; Athanasios Chatzidimitriou; Sotiris Tselonis; Manolis Kaliorakis; Dimitris Gizopoulos; Marc Riera; Ramon Canal; Antonio González 001; Maha Kooli; et al. (ITC, 2016)

Using outliers to detect stealthy hardware trojan triggering? - Papa-Sidy Ba; Sophie Dupuis; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (IVSW, 2016)

Improving Stress Quality for SoC Using Faster-than-At-Speed Execution of Functional Programs. - Paolo Bernardi; Alberto Bosio; Giorgio Di Natale; Andrea Guerriero; Ernesto Sánchez 001; Federico Venini (VLSI-SoC (Selected Papers), 2016)

Faster-than-at-speed execution of functional programs: An experimental analysis. - Paolo Bernardi; Alberto Bosio; Giorgio Di Natale; Andrea Guerriero; Federico Venini (VLSI-SoC, 2016)

Cache- and register-aware system reliability evaluation based on data lifetime analysis. - Maha Kooli; Firas Kaddachi; Giorgio Di Natale; Alberto Bosio (VTS, 2016)

Security primitives (PUF and TRNG) with STT-MRAM. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (VTS, 2016)

Frontside Versus Backside Laser Injection: A Comparative Study. - Stephan De Castro; Jean-Max Dutertre; Bruno Rouzeyre; Giorgio Di Natale; Marie-Lise Flottes (ACM J. Emerg. Technol. Comput. Syst., 2016)

STT-MRAM-Based PUF Architecture Exploiting Magnetic Tunnel Junction Fabrication-Induced Variability. - Elena-Ioana Vatajelu; Giorgio Di Natale; Mario Barbareschi; Lionel Torres; Marco Indaco; Paolo Prinetto (ACM J. Emerg. Technol. Comput. Syst., 2016)

Ring oscillators analysis for security purposes in Spartan-6 FPGAs. - Mario Barbareschi; Giorgio Di Natale; Lionel Torres (Microprocess. Microsystems, 2016)

Introduction to Special Issue on Trustworthy Manufacturing and Utilization of Secure Devices (TRUDEVICE). - Lilian Bossuet; Giorgio Di Natale; Paris Kitsos (Microprocess. Microsystems, 2016)

Editorial. - Giorgio Di Natale; Stefano Zanero (IEEE Trans. Emerg. Top. Comput., 2016)

Do we need a holistic approach for the design of secure IoT systems? - Mauro Conti; Giorgio Di Natale; Annelie Heuser; Thomas Pöppelmann; Nele Mentens (Conf. Computing Frontiers, 2017)

Scan chain encryption for the test, diagnosis and debug of secure circuits. - Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre; Paolo Prinetto; Marco Restifo (ETS, 2017)

Reliability of computing systems: From flip flops to variables. - Giorgio Di Natale; Maha Kooli; Alberto Bosio; Michele Portolan; Régis Leveugle (IOLTS, 2017)

Hacking the Control Flow error detection mechanism. - Giorgio Di Natale; Marie-Lise Flottes; Sophie Dupuis; Bruno Rouzeyre (IVSW, 2017)

Experimentations on scan chain encryption with PRESENT. - Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (IVSW, 2017)

Zero bit-error-rate weak PUF based on Spin-Transfer-Torque MRAM memories. - Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Prinetto (IVSW, 2017)

Report on DATE 2017 in Lausanne. - David Atienza; Giorgio Di Natale (IEEE Des. Test, 2017)

Computing reliability: On the differences between software testing and software fault injection techniques. - Maha Kooli; Firas Kaddachi; Giorgio Di Natale; Alberto Bosio; Pascal Benoit; Lionel Torres (Microprocess. Microsystems, 2017)

SI ECCS: SECure context saving for IoT devices. - Emanuele Valea; Mathieu Da Silva; Giorgio Di Natale; Marie-Lise Flottes; Sophie Dupuis; Bruno Rouzeyre (DTIS, 2018)

Laser Fault Injection at the CMOS 28 nm Technology Node: an Analysis of the Fault Model. - Jean-Max Dutertre; Vincent Beroulle; Philippe Candelier; Stephan De Castro; Louis-Barthelemy Faber; Marie-Lise Flottes; Philippe Gendrier; David Hély; Régis Leveugle; Paolo Maistri; Giorgio Di Natale; Athanasios Papadimitriou; et al. (FDTC, 2018)

The case of using CMOS FD-SOI rather than CMOS bulk to harden ICs against laser attacks. - Jean-Max Dutertre; Vincent Beroulle; Philippe Candelier; Louis-Barthelemy Faber; Marie-Lise Flottes; Philippe Gendrier; David Hély; Régis Leveugle; Paolo Maistri; Giorgio Di Natale; Athanasios Papadimitriou; Bruno Rouzeyre (IOLTS, 2018)

A Novel Use of Approximate Circuits to Thwart Hardware Trojan Insertion and Provide Obfuscation. - Honorio Martín; Luis Entrena; Sophie Dupuis; Giorgio Di Natale (IOLTS, 2018)

A New Secure Stream Cipher for Scan Chain Encryption. - Mathieu Da Silva; Emanuele Valea; Marie-Lise Flottes; Sophie Dupuis; Giorgio Di Natale; Bruno Rouzeyre (IVSW, 2018)

Encryption of test data: which cipher is better? - Mathieu Da Silva; Emanuele Valea; Marie-Lise Flottes; Sophie Dupuis; Giorgio Di Natale; Bruno Rouzeyre (PRIME, 2018)

Neuromorphic Computing - From Robust Hardware Architectures to Testing Strategies. - Lorena Anghel; Denys Ly; Giorgio Di Natale; Benoît Miramond; Elena-Ioana Vatajelu; Elisa Vianello (VLSI-SoC, 2018)

Protection Against Hardware Trojans With Logic Testing: Proposed Solutions and Challenges Ahead. - Sophie Dupuis; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (IEEE Des. Test, 2018)

Assessing body built-in current sensors for detection of multiple transient faults. - Raphael Andreoni Camponogara Viera; Jean-Max Dutertre; Marie-Lise Flottes; Olivier Potin; Giorgio Di Natale; Bruno Rouzeyre; Rodrigo Possamai Bastos (Microelectron. Reliab., 2018)

A Ring Oscillator-Based Identification Mechanism Immune to Aging and External Working Conditions. - Mario Barbareschi; Giorgio Di Natale; Lionel Torres; Antonino Mazzeo (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Towards a Dependable True Random Number Generator With Self-Repair Capabilities. - Honorio Martín; Giorgio Di Natale; Luis Entrena (IEEE Trans. Circuits Syst. I Regul. Pap., 2018)

Guest Editorial: IEEE Transactions on Emerging Topics in Computing Special Issue on Design & Technology of Integrated Systems in Deep Submicron Era. - Giorgio Di Natale; Marco Ottavi (IEEE Trans. Emerg. Top. Comput., 2018)

Hidden-Delay-Fault Sensor for Test, Reliability and Security. - Giorgio Di Natale; Elena-Ioana Vatajelu; Kalpana Senthamarai Kannan; Lorena Anghel (DATE, 2019)

Encryption-Based Secure JTAG. - Emanuele Valea; Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (DDECS, 2019)

Rebooting Computing: The Challenges for Test and Reliability. - Alberto Bosio; Ian O'Connor; Gennaro Severino Rodrigues; Fernanda Lima Kastensmidt; Elena I. Vatajelu; Giorgio Di Natale; Lorena Anghel; Surya Nagarajan; Moritz Fieback; Said Hamdioui (DFT, 2019)

Providing Confidentiality and Integrity in Ultra Low Power IoT Devices. - Emanuele Valea; Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Sophie Dupuis; Bruno Rouzeyre (DTIS, 2019)

Alternatives to Fault Injections for Early Safety/Security Evaluations. - Michele Portolan; Alessandro Savino; Régis Leveugle; Stefano Di Carlo; Alberto Bosio; Giorgio Di Natale (ETS, 2019)

HATE: a HArdware Trojan Emulation Environment for Microprocessor-based Systems. - Cristiana Bolchini; Luca Cassano; Ivan Montalbano; Giampiero Repole; Andrea Zanetti; Giorgio Di Natale (IOLTS, 2019)

On the Encryption of the Challenge in Physically Unclonable Functions. - Elena-Ioana Vatajelu; Giorgio Di Natale; Mohd Syafiq Mispan; Basel Halak (IOLTS, 2019)

On the Reliability of the Ring Oscillator Physically Unclonable Functions. - Honorio Martín; Elena-Ioana Vatajelu; Giorgio Di Natale; Osnat Keren (IVSW, 2019)

A Comprehensive Approach to a Trusted Test Infrastructure. - Marc Merandat; Vincent Reynaud; Emanuele Valea; Jérôme Quévremont; Nicolas Valette; Paolo Maistri; Régis Leveugle; Marie-Lise Flottes; Sophie Dupuis; Bruno Rouzeyre; Giorgio Di Natale (IVSW, 2019)

Special Session: Reliability of Hardware-Implemented Spiking Neural Networks (SNN). - Elena-Ioana Vatajelu; Giorgio Di Natale; Lorena Anghel (VTS, 2019)

SECCS: SECure Context Saving for IoT Devices. - Emanuele Valea; Mathieu Da Silva; Giorgio Di Natale; Marie-Lise Flottes; Sophie Dupuis; Bruno Rouzeyre (CoRR, 2019)

A Survey on Security Threats and Countermeasures in IEEE Test Standards. - Emanuele Valea; Mathieu Da Silva; Giorgio Di Natale; Marie-Lise Flottes; Bruno Rouzeyre (IEEE Des. Test, 2019)

Memory-Aware Design Space Exploration for Reliability Evaluation in Computing Systems. - Maha Kooli; Giorgio Di Natale; Alberto Bosio (J. Electron. Test., 2019)

Stream vs block ciphers for scan encryption. - Emanuele Valea; Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (Microelectron. J., 2019)

SyRA: Early System Reliability Analysis for Cross-Layer Soft Errors Resilience in Memory Arrays of Microprocessor Systems. - Alessandro Vallero; Alessandro Savino; Athanasios Chatzidimitriou; Manolis Kaliorakis; Maha Kooli; Marc Riera; Martí Anglada; Giorgio Di Natale; Alberto Bosio; Ramon Canal; Antonio González 001; Dimitris Gizopoulos; et al. (IEEE Trans. Computers, 2019)

Preventing Scan Attacks on Secure Circuits Through Scan Chain Encryption. - Mathieu Da Silva; Marie-Lise Flottes; Giorgio Di Natale; Bruno Rouzeyre (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2019)

High-Entropy STT-MTJ-Based TRNG. - Elena-Ioana Vatajelu; Giorgio Di Natale (IEEE Trans. Very Large Scale Integr. Syst., 2019)

Latest Trends in Hardware Security and Privacy. - Giorgio Di Natale; Francesco Regazzoni 001; Vincent Albanese; Frank Lhermet; Yann Loisel; Abderrahmane Sensaoui; Samuel Pagliarini (DFT, 2020)

PUF Enrollment and Life Cycle Management: Solutions and Perspectives for the Test Community. - Amir Alipour; Vincent Beroulle; Bertrand Cambou; Jean-Luc Danger; Giorgio Di Natale; David Hély; Sylvain Guilley; Naghmeh Karimi (ETS, 2020)

Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. - Mohamed Elshamy; Giorgio Di Natale; Antonios Pavlidis; Marie-Minerve Louërat; Haralampos-G. D. Stratigopoulos (ETS, 2020)

Nonlinear Codes for Control Flow Checking. - Giorgio Di Natale; Osnat Keren (ETS, 2020)

Machine Learning and Hardware security: Challenges and Opportunities -Invited Talk-. - Francesco Regazzoni 001; Shivam Bhasin; Amir Alipour; Ihab Alshaer; Furkan Aydin; Aydin Aysu; Vincent Beroulle; Giorgio Di Natale; Paul D. Franzon; David Hély; Naofumi Homma; Akira Ito 002; et al. (ICCAD, 2020)

Holding Conferences Online due to COVID-19: The DATE Experience. - Giorgio Di Natale; Cristiana Bolchini (IEEE Des. Test, 2020)

Scramble Cache: An Efficient Cache Architecture for Randomized Set Permutation. - Amine Jaamoum; Thomas Hiscock; Giorgio Di Natale (DATE, 2021)

Identification of Hardware Devices based on Sensors and Switching Activity: a Preliminary Study. - Honorio Martín; Elena-Ioana Vatajelu; Giorgio Di Natale (DATE, 2021)

On the Limitations of Concatenating Boolean Operations in Memristive-Based Logic-In-Memory Solutions. - Pietro Inglese; Elena-Ioana Vatajelu; Giorgio Di Natale (DTIS, 2021)

Design Space Exploration Applied to Security. - Antoine Linarès; David Hély; Frank Lhermet; Giorgio Di Natale (DTIS, 2021)

Automated Dysfunctional Model Extraction for Model Based Safety Assessment of Digital Systems. - Tiziano Fiorucci; Jean-Marc Daveau; Giorgio Di Natale; Philippe Roche (IOLTS, 2021)

Security EDA Extension through P1687.1 and 1687 Callbacks. - Michele Portolan; Vincent Reynaud; Paolo Maistri; Régis Leveugle; Giorgio Di Natale (ITC, 2021)

Elaborating on Sub-Space Modeling as an Enrollment Solution for Strong PUF. - Amir Ali Pour; David Hély; Vincent Beroulle; Giorgio Di Natale (DCOSS, 2022)

Dependability of Alternative Computing Paradigms for Machine Learning: hype or hope? - Cristiana Bolchini; Alberto Bosio; Luca Cassano; Bastien Deveautour; Giorgio Di Natale; Antonio Miele; Ian O'Connor; Elena-Ioana Vatajelu (DDECS, 2022)

On the optimization of Software Obfuscation against Hardware Trojans in Microprocessors. - Luca Cassano; Elia Lazzeri; Nikita Litovchenko; Giorgio Di Natale (DDECS, 2022)

On-Line Reliability Estimation of Ring Oscillator PUF. - Sergio Vinagrero Gutierrez; Giorgio Di Natale; Elena-Ioana Vatajelu (ETS, 2022)

Software Product Reliability Based on Basic Block Metrics Recomposition. - Tiziano Fiorucci; Giorgio Di Natale; Jean-Marc Daveau; Philippe Roche (IOLTS, 2022)

Sub-Space Modeling: An Enrollment Solution for XOR Arbiter PUF using Machine Learning. - Amir Ali Pour; David Hély; Vincent Beroulle; Giorgio Di Natale (ISQED, 2022)

An Efficient Approach to Model Strong PUF with Multi-Layer Perceptron using Transfer Learning. - Amir Ali Pour; David Hély; Vincent Beroulle; Giorgio Di Natale (ISQED, 2022)

Secure PUF-based Authentication and Key Exchange Protocol using Machine Learning. - Amir Ali Pour; Fatemeh Afghah; David Hély; Vincent Beroulle; Giorgio Di Natale (ISVLSI, 2022)

Circuit-to-Circuit Attacks in SoCs via Trojan-Infected IEEE 1687 Test Infrastructure. - Michele Portolan; Antonios Pavlidis; Giorgio Di Natale; Eric Faehn; Haralampos-G. Stratigopoulos (ITC, 2022)

Helper Data Masking for Physically Unclonable Function-Based Key Generation Algorithms. - Amir Ali Pour; Fatemeh Afghah; David Hély; Vincent Beroulle; Giorgio Di Natale; Ashwija Reddy Korenda; Bertrand Cambou (IEEE Access, 2022)

Flexible and Portable Management of Secure Scan Implementations Exploiting P1687.1 Extensions. - Michele Portolan; Emanuele Valea; Paolo Maistri; Giorgio Di Natale (IEEE Des. Test, 2022)

DETON: DEfeating hardware Trojan horses in microprocessors through software ObfuscatioN. - Luca Cassano; Mattia Iamundo; Tomas Antonio Lopez; Alessandro Nazzari; Giorgio Di Natale (J. Syst. Archit., 2022)

Nonlinear Code-Based Low-Overhead Fine-Grained Control Flow Checking. - Gilad Dar; Giorgio Di Natale; Osnat Keren (IEEE Trans. Computers, 2022)

Digital-to-Analog Hardware Trojan Attacks. - Mohamed Elshamy; Giorgio Di Natale; Alhassan Sayed; Antonios Pavlidis; Marie-Minerve Louërat; Hassan Aboushady; Haralampos-G. Stratigopoulos (IEEE Trans. Circuits Syst. I Regul. Pap., 2022)

Open Automation Framework for Complex Parametric Electrical Simulations. - Sergio Vinagrero Gutierrez; Pietro Inglese; Giorgio Di Natale; Elena-Ioana Vatajelu (DDECS, 2023)

EUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. - Fabio Pavanello; Cédric Marchand 002; Ian O'Connor; Régis Orobtchouk; Fabien Mandorlo; Xavier Letartre; Sébastien Cueff; Elena-Ioana Vatajelu; Giorgio Di Natale; Benoit Cluzel; Aurelien Coillet; Benoît Charbonnier; et al. (ETS, 2023)

A Study of High Temperature Effects on Ring Oscillator Based Physical Unclonable Functions. - Aghiles Douadi; Giorgio Di Natale; Paolo Maistri; Elena-Ioana Vatajelu; Vincent Beroulle (IOLTS, 2023)

Experimental Evaluation of Delayed-Based Detectors Against Power-off Attack. - Maryam Esmaeilian; Aghiles Douadi; Zahra Kazemi; Vincent Beroulle; Amir-Pasha Mirbaha; Mahdi Fazeli; Elena-Ioana Vatajelu; Paolo Maistri; Giorgio Di Natale (IOLTS, 2023)

On-Line Method to Limit Unreliability and Bit-Aliasing in RO-PUF. - Sergio Vinagrero Gutierrez; Giorgio Di Natale; Elena-Ioana Vatajelu (IOLTS, 2023)

NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS. - Fabio Pavanello; Cédric Marchand 002; Ian O'Connor; Régis Orobtchouk; Fabien Mandorlo; Xavier Letartre; Sébastien Cueff; Elena-Ioana Vatajelu; Giorgio Di Natale; Benoit Cluzel; Aurelien Coillet; Benoît Charbonnier; et al. (CoRR, 2023)

Python Framework for Modular and Parametric SPICE Netlists Generation. - Sergio Vinagrero Gutierrez; Giorgio Di Natale; Elena-Ioana Vatajelu (CoRR, 2023)

SRAM-Based PUF Readouts. - Sergio Vinagrero Gutierrez; Honorio Martín; Alice De Bignicourt; Elena-Ioana Vatajelu; Giorgio Di Natale (Zenodo, 2023)

Introduction to the Special Issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle. - Farimah Farahmandi; Ankur Srivastava 001; Giorgio Di Natale; Mark Tehranipoor (ACM J. Emerg. Technol. Comput. Syst., 2023)

Using Approximate Circuits Against Hardware Trojans. - Honorio Martín; Sophie Dupuis; Giorgio Di Natale; Luis Entrena (IEEE Des. Test, 2023)

Security Layers and Related Services within the Horizon Europe NEUROPULS Project. - Fabio Pavanello; Cédric Marchand 002; Paul Jiménez; Xavier Letartre; Ricardo Chaves; Niccolò Marastoni; Alberto Lovato; Mariano Ceccato; George Papadimitriou 001; Vasileios Karakostas; Dimitris Gizopoulos; Roberta Bardini; et al. (DATE, 2024)

Modeling Thermal Effects For Biasing PUFs. - Aghiles Douadi; Elena-Ioana Vatajelu; Paolo Maistri; David Hély; Vincent Beroulle; Giorgio Di Natale (ETS, 2024)

IEEE 1838 compliant scan encryption and integrity for 2.5/3D ICs. - Juan Suzano; Antoine Chastand; Emanuele Valea; Giorgio Di Natale; Anthony Philippe; Fady Abouzeid; Philippe Roche (ETS, 2024)

Autonomous FPGA Reconfigurability in Embedded Systems. - Hugo Boulissière; Adrien Prost-Boucle; Elena-Ioana Vatajelu; Giorgio Di Natale (EWDTS, 2024)

Non-Invasive Attack on Ring Oscillator-Based PUFs Through Localized X-Ray Irradiation. - Nasr-Eddine Ouldei Tebina; Aghiles Douadi; Luc Salvo; Vincent Beroulle; Nacer-Eddine Zergainoh; Guillaume Hubert; Elena-Ioana Vatajelu; Giorgio Di Natale; Paolo Maistri (HOST, 2024)

Internal State Monitoring in RISC-V Microarchitectures for Security Purpose. - Roua Boulifa; Giorgio Di Natale; Paolo Maistri (LATS, 2024)

On Hardware Security and Trust for Chiplet-Based 2.5D and 3D ICs: Challenges and Innovations. - Juan Suzano; Fady Abouzeid; Giorgio Di Natale; Anthony Philippe; Philippe Roche (IEEE Access, 2024)

Side Channel and Fault Analyses on Memristor-Based Logic In-Memory. - Pietro Inglese; Elena-Ioana Vatajelu; Giorgio Di Natale (IEEE Des. Test, 2024)

On the Relation Between Reliability and Entropy in Physical Unclonable Functions. - Vasilii Kulagin; Sergio Vinagrero Gutierrez; Tobias Kilian; Daniel Tille; Ulf Schlichtmann; Giorgio Di Natale; Elena-Ioana Vatajelu (IEEE Des. Test, 2024)

Late Breaking Results: Automatic Anomaly Detection Method in Physical Unclonable Functions using Data Mining Techniques. - Mohammad Reza Heidari Iman; Sergio Vinagrero Gutierrez; Elena-Ioana Vatajelu; Giorgio Di Natale (DATE, 2025)

Improving Software Reliability with Rust: Implementation for Enhanced Control Flow Checking Methods. - Jacopo Sini; Mohammadreza Amel Solouki; Massimo Violante; Giorgio Di Natale (DATE, 2025)

An Innovative Data Mining Technique for Automatic Anomaly Detection in Physical Unclonable Functions. - Mohammad Reza Heidari Iman; Sergio Vinagrero Gutierrez; Elena-Ioana Vatajelu; Giorgio Di Natale (DDECS, 2025)

A Survey on Automatic Assertion Miners. - Mohammad Reza Heidari Iman; Giorgio Di Natale; Katell Morin-Allory (DDECS, 2025)

Early Result Capture: Racing Conditions in Pipeline due to Clock Glitches. - Roua Boulifa; Paolo Maistri; Giorgio Di Natale (ETS, 2025)

Reliability Under Stress: The Impact of Localized Aging on RO-PUF Architectures in FPGAs. - Aghiles Douadi; Elena-Ioana Vatajelu; Paolo Maistri; David Hély; Vincent Beroulle; Giorgio Di Natale (ETS, 2025)

Physical Unclonable Functions (PUFs): Foundations, Evaluation, and Testing for Secure Hardware Systems. - Sergio Vinagrero Gutierrez; Giorgio Di Natale; Elena-Ioana Vatajelu (ETS, 2025)

European Test Symposium Teams: an Anniversary Snapshot. - Maksim Jenihhin; Jaan Raik; Artur Jutman; Natalia Cherezova; Raimund Ubar; Liviu Miclea; Szilárd Enyedi; I. Stefan; Ovidiu Stan; Cosmina Corches; Z. Peng; Petru Eles; et al. (ETS, 2025)

Optimizing RO-PUFs: A Filtering Approach to Reliability and Entropy Trade-offs. - Vasilii Kulagin; Giorgio Di Natale; Elena-Ioana Vatajelu (ETS, 2025)

Real-Time Fault Analysis in RISC-V Processors: A Case Study Using the Internal State Monitor. - Roua Boulifa; Yongxin Sun; Giorgio Di Natale; Paolo Maistri (IOLTS, 2025)

A Fuzzy Logic-Based System for Detecting Trustable Physical Unclonable Functions. - Mohammad Reza Heidari Iman; Sergio Vinagrero Gutierrez; Elena-Ioana Vatajelu; Giorgio Di Natale (IOLTS, 2025)

TIMA-PUF: Time Measurement Based Arbiter PUF. - Azzadine Thajte; Laurent Fesquet; Giorgio Di Natale (IOLTS, 2025)