Variable packet size buffered crossbar (CICQ) switches. - Manolis Katevenis; Giorgos Passas; Dimitrios Simos; Ioannis Papaefstathiou; Nikolaos Chrysos (ICC, 2004)

Variable-size multipacket segments in buffered crossbar (CICQ) architectures. - Manolis Katevenis; Giorgos Passas (ICC, 2005)

A 128 x 128 x 24Gb/s Crossbar Interconnecting 128 Tiles in a Single Hop and Occupying 6% of Their Area. - Giorgos Passas; Manolis Katevenis; Dionisios N. Pnevmatikatos (NOCS, 2010)

VLSI micro-architectures for high-radix crossbar schedulers. - Giorgos Passas; Manolis Katevenis; Dionisios N. Pnevmatikatos (NOCS, 2011)

Crossbar NoCs Are Scalable Beyond 100 Nodes. - Giorgos Passas; Manolis Katevenis; Dionisios N. Pnevmatikatos (IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2012)

The Combined Input-Output Queued Crossbar Architecture for High-Radix On-Chip Switches. - Giorgos Passas; Manolis Katevenis; Dionisios N. Pnevmatikatos (IEEE Micro, 2015)

Uber: Utilizing Buffers to Simplify NoCs for Hundreds-Cores. - Giorgos Passas (CoRR, 2016)