Dynamic power of CMOS gates driving lossy transmission lines. - Gregorio Cappuccino; Pasquale Corsonello; Giuseppe Cocorullo; Stefania Perri; Giovanni Staino (ICECS, 2001)

VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo; Gregorio Cappuccino; Giovanni Staino (ICECS, 2001)

Efficient Implementation of Cellular Algorithms on Reconfigurable Hardware. - Pasquale Corsonello; Giandomenico Spezzano; Giovanni Staino; Domenico Talia (PDP, 2002)

A low-power sub-nanosecond standard-cells based adder. - Stefania Perri; Pasquale Corsonello; Giovanni Staino (ICECS, 2003)

CARMEN: cellular automata reconfigurable machine for effective computation. - Giovanni Staino (2003)

Low bit rate image compression core for onboard space applications. - Pasquale Corsonello; Stefania Perri; Giovanni Staino; Marco Lanuzza; Giuseppe Cocorullo (IEEE Trans. Circuits Syst. Video Technol., 2006)

Design and Implementation of a 90nm Low bit-rate Image Compression Core. - Pasquale Corsonello; Stefania Perri; Giovanni Staino; Marco Lanuzza; Giuseppe Cocorullo (DSD, 2007)

Quad-Port Memory Blocks in Radiation-Tolerant FPGAs: An Application for Image Processing Systems. - Aakash Jain; Giovanni Staino; Pasquale Corsonello (ICETET, 2009)