An Analog VLSI Loser-Take-All Circuit. - Girish N. Patel; Stephen P. DeWeerth (ISCAS, 1995)

A VLSI Architecture for Modeling Intersegmental Coordination. - Stephen P. DeWeerth; Girish N. Patel; Mario F. Simoni; David E. Schimmel; Ronald L. Calabrese (ARVLSI, 1997)

Analog VLSI Model of Intersegmental Coordination with Nearest-Neighbor Coupling. - Girish N. Patel; Jeremy H. Holleman; Stephen P. DeWeerth (NIPS, 1997)

A Neuromorphic VLSI System for Modeling the Neural Control of Axial Locomotion. - Girish N. Patel; Edgar A. Brown; Stephen P. DeWeerth (NIPS, 1999)

Bifurcation Analysis of a Silicon Neuron. - Girish N. Patel; Gennady S. Cymbalyuk; Ronald L. Calabrese; Stephen P. DeWeerth (NIPS, 1999)

Modeling Alternation to Synchrony with Inhibitory Coupling: A Neuromorphic VLSI Approach. - Gennady S. Cymbalyuk; Girish N. Patel; Ronald L. Calabrese; Stephen P. DeWeerth; Avis H. Cohen (Neural Comput., 2000)

A bifurcation of a synchronous oscillations into a torus in a system of two mutually inhibitory aVLSI neurons: experimental observation. - Vladimir E. Bondarenko; Gennady S. Cymbalyuk; Girish N. Patel; Stephen P. DeWeerth; Ronald L. Calabrese (Neurocomputing, 2003)

An asynchronous architecture for modeling intersegmental neural communication. - Girish N. Patel; Michael S. Reid; David E. Schimmel; Stephen P. DeWeerth (IEEE Trans. Very Large Scale Integr. Syst., 2006)