Generic System Verilog Universal Verification Methodology based Reusable Verification Environment for Efficient Verification of Image Signal Processing IPs/SoCs - Abhishek Jain 003; Giuseppe Bonanno; Hima Gupta; Ajay Goyal (CoRR, 2013)

Fault Detection and Identification Method Based on Genetic Algorithms to Monitor Degradation of Electrohydraulic Servomechanisms. - Matteo D. L. Dalla Vedova; Pier Carlo Berri; Giuseppe Bonanno; Paolo Maggiore (ICSRS, 2019)