High performance VLSI modules for division and square root. - Gregorio Cappuccino; Pasquale Corsonello; Giuseppe Cocorullo (Microprocess. Microsystems, 1998)

A Time-Domain Model for Power Dissipation of CMOS Buffers Driving Lossy Transmission Lines. - Gregorio Cappuccino; Giuseppe Cocorullo (EUROMICRO, 1999)

A 56-bit self-timed adder for high speed asynchronous datapath. - Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (ICECS, 1999)

Designing High-Speed Asynchronous Pipelines. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (EUROMICRO, 2000)

VLSI Implementation of a Low-Power High-Speed Self-Timed Adder. - Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (PATMOS, 2000)

CMOS sizing rule for high performance long interconnects. - Gregorio Cappuccino; Giuseppe Cocorullo (DATE, 2001)

Dynamic power of CMOS gates driving lossy transmission lines. - Gregorio Cappuccino; Pasquale Corsonello; Giuseppe Cocorullo; Stefania Perri; Giovanni Staino (ICECS, 2001)

VLSI implementation of a fully static CMOS 56-bit self-timed adder using overlapped execution circuits. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo; Gregorio Cappuccino; Giovanni Staino (ICECS, 2001)

Operating Region Modelling and Timing Analysis of CMOS Gates Driving Transmission Lines. - Gregorio Cappuccino; Giuseppe Cocorullo (PATMOS, 2002)

VLSI circuits for low-power high-speed asynchronous addition. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (IEEE Trans. Very Large Scale Integr. Syst., 2002)

Variable Precision Multipliers for FPGA-Based Reconfigurable Computing Systems. - Pasquale Corsonello; Stefania Perri; Maria Antonia Iachino; Giuseppe Cocorullo (FPL, 2003)

A high-speed energy-efficient 64-bit reconfigurable binary adder. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (IEEE Trans. Very Large Scale Integr. Syst., 2003)

Variable precision arithmetic circuits for FPGA-based multimedia processors. - Stefania Perri; Pasquale Corsonello; Maria Antonia Iachino; Marco Lanuzza; Giuseppe Cocorullo (IEEE Trans. Very Large Scale Integr. Syst., 2004)

Output Resistance Scaling Model for Deep-Submicron Cmos Buffers for Timing Performance Optimisation. - Gregorio Cappuccino; Andrea Pugliese 002; Giuseppe Cocorullo (PATMOS, 2005)

Fast Low-Power 64-Bit Modular Hybrid Adder. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (PATMOS, 2005)

Microprocessor-based FPGA implementation of SPIHT image compression subsystems. - Pasquale Corsonello; Stefania Perri; Paolo Zicari; Giuseppe Cocorullo (Microprocess. Microsystems, 2005)

A high-performance fully reconfigurable FPGA-based 2D convolution processor. - Stefania Perri; Marco Lanuzza; Pasquale Corsonello; Giuseppe Cocorullo (Microprocess. Microsystems, 2005)

Leakage energy reduction techniques in deep submicron cache memories: a comparative study. - Fabio Frustaci; Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (ISCAS, 2006)

A Simple MOSFET Parasitic Capacitance Model and Its Application to Repeater Insertion Technique. - Andrea Pugliese 002; Gregorio Cappuccino; Giuseppe Cocorullo (PATMOS, 2006)

Correct Modelling of Nested Miller Compensated Amplifier for Discrete-Time Applications. - Andrea Pugliese 002; Gregorio Cappuccino; Giuseppe Cocorullo (PATMOS, 2006)

Low bit rate image compression core for onboard space applications. - Pasquale Corsonello; Stefania Perri; Giovanni Staino; Marco Lanuzza; Giuseppe Cocorullo (IEEE Trans. Circuits Syst. Video Technol., 2006)

Techniques for Leakage Energy Reduction in Deep Submicrometer Cache Memories. - Fabio Frustaci; Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (IEEE Trans. Very Large Scale Integr. Syst., 2006)

Design and Implementation of a 90nm Low bit-rate Image Compression Core. - Pasquale Corsonello; Stefania Perri; Giovanni Staino; Marco Lanuzza; Giuseppe Cocorullo (DSD, 2007)

Design methodology of nested-Miller amplifiers for small capacitive loads. - Andrea Pugliese 002; Gregorio Cappuccino; Giuseppe Cocorullo (ECCTD, 2007)

Settling Time Minimization of Operational Amplifiers. - Andrea Pugliese 002; Gregorio Cappuccino; Giuseppe Cocorullo (PATMOS, 2007)

A New Dynamic Logic Circuit Design for an Effective Trade-Off between Noise-Immunity, Performance and Energy Dissipation. - Fabio Frustaci; Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (PATMOS, 2008)

Settling-Optimization-Based Design Approach for Three-Stage Nested-Miller Amplifiers. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (PATMOS, 2008)

High-performance noise-tolerant circuit techniques for CMOS dynamic logic. - Fabio Frustaci; Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (IET Circuits Devices Syst., 2008)

A matrix product accelerator for field programmable systems on chip. - Paolo Zicari; Pasquale Corsonello; Stefania Perri; Giuseppe Cocorullo (Microprocess. Microsystems, 2008)

Design Procedure for Settling Time Minimization in Three-Stage Nested-Miller Amplifiers. - Andrea Pugliese 002; Gregorio Cappuccino; Giuseppe Cocorullo (IEEE Trans. Circuits Syst. II Express Briefs, 2008)

Effect of OP-amp Phase Margin on SC SigmaDelta Modulator Performances. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (ISCAS, 2009)

Settling Time Optimization for Three-Stage CMOS Amplifier Topologies. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (IEEE Trans. Circuits Syst. I Regul. Pap., 2009)

Analysis of op-amp phase margin impact on SC SigmaDelta modulator performance. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (Microelectron. J., 2010)

Analysis of the Impact of High-Order Integrator Dynamics on SC Sigma-Delta Modulator Performances. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Corrections to "Settling Time Optimization for Three-Stage CMOS Amplifier Topologies" [Dec 09 2569-2582]. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (IEEE Trans. Circuits Syst. I Regul. Pap., 2010)

Design approach for high-bandwidth low-power three-stage operational amplifiers. - Andrea Pugliese 002; Francesco A. Amoroso; Gregorio Cappuccino; Giuseppe Cocorullo (Int. J. Circuit Theory Appl., 2012)

Low-cost FPGA stereo vision system for real time disparity maps calculation. - Paolo Zicari; Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (Microprocess. Microsystems, 2012)

Adaptive Census Transform: A novel hardware-oriented stereovision algorithm. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (Comput. Vis. Image Underst., 2013)

A novel background subtraction method based on color invariants and grayscale levels. - Lorena Guachi; Giuseppe Cocorullo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (ICCST, 2014)

Area-Delay Efficient Binary Adders in QCA. - Stefania Perri; Pasquale Corsonello; Giuseppe Cocorullo (IEEE Trans. Very Large Scale Integr. Syst., 2014)

Design of efficient QCA multiplexers. - Giuseppe Cocorullo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (Int. J. Circuit Theory Appl., 2016)

An efficient hardware-oriented stereo matching algorithm. - Giuseppe Cocorullo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (Microprocess. Microsystems, 2016)

Design of Efficient BCD Adders in Quantum-Dot Cellular Automata. - Giuseppe Cocorullo; Pasquale Corsonello; Fabio Frustaci; Stefania Perri (IEEE Trans. Circuits Syst. II Express Briefs, 2017)

A Smart Torque Control for a High Efficiency 4WD Electric Vehicle. - Antonio Cordopatri; Giuseppe Cocorullo (ApplePies, 2018)

Multimodal background subtraction for high-performance embedded systems. - Giuseppe Cocorullo; Pasquale Corsonello; Fabio Frustaci; Lorena-de-los-Angeles Guachi-Guachi; Stefania Perri (J. Real Time Image Process., 2019)

Junction Temperature Measurement in Optically-Controlled Power Mosfet. - Sandro Rao; Elisa Demetra Mallemace; Giuseppe Cocorullo; Lakhdar Dehimi; Francesco Giuseppe Della Corte (PHOTOPTICS, 2021)

Robust and High-Performance Machine Vision System for Automatic Quality Inspection in Assembly Processes. - Fabio Frustaci; Fanny Spagnolo; Stefania Perri; Giuseppe Cocorullo; Pasquale Corsonello (Sensors, 2022)