A 10 MHz Relaxation Oscillator with a novel Jitter Suppression Comparator Autozeroing technique. - Mattia Cicalini; Daniele Marchetti; Andrea Ria; Giuseppe Manfredini; Alessandro Catania; Massimo Piotto; Paolo Bruschi (ICECS, 2020)

A 2 nW 0.25 V 140 dB-FOM Inverter-Based First Order ΔΣ Modulator. - Alessandro Catania; Lorenzo Benvenuti; Andrea Ria; Giuseppe Manfredini; Massimo Piotto; Paolo Bruschi (IEEE Trans. Circuits Syst. II Express Briefs, 2020)

The SENSIPLUS: A Single-Chip Fully Programmable Sensor Interface. - Andrea Ria; Mattia Cicalini; Giuseppe Manfredini; Alessandro Catania; Massimo Piotto; Paolo Bruschi (ApplePies, 2021)

A False Positive Reduction System For Continuous Water Quality Monitoring. - Alessandro Bria; Luigi Ferrigno; Luca Gerevini; Claudio Marrocco; Mario Molinara; Paolo Bruschi; Mattia Cicalini; Giuseppe Manfredini; Andrea Ria; Gianni Cerro; Roberto Simmarano; Giovanni Teolis; et al. (SMARTCOMP, 2021)

A 150 mV, Sub-1 nW, 0.75%-Full-Scale INL Delta-Sigma ADC for Power-Autonomous Sensor Nodes. - Alessandro Catania; Andrea Ria; Giuseppe Manfredini; Michele Dei; Massimo Piotto; Paolo Bruschi (ESSCIRC, 2022)

A 3-decade-frequency-range Sinewave Synthesizer with Analog Piecewise-linear Interpolation. - Francesco Gagliardi 002; Andrea Ria; Giuseppe Manfredini; Paolo Bruschi; Massimo Piotto (PRIME, 2022)

A Triode-Compensated CMOS Bandgap Core for Sub-250 mV Supply Voltages. - Francesco Gagliardi 002; Andrea Ria; Giuseppe Manfredini; Massimo Piotto; Paolo Bruschi (PRIME, 2022)

An Open Source C Code Generator and a Tiny Machine Learning Toolchain for the SENSIPLUS Platform. - Alessandro Bria; Luigi Ferrigno; Claudio Marrocco; Mario Molinara; Michele Vitelli; Andrea Ria; Mattia Cicalini; Giuseppe Manfredini; Paolo Bruschi (SMARTCOMP, 2022)

Inverter-Based Fully-Differential Amplifier with 150 mV minimum Supply Voltage. - Alessandro Catania; Giuseppe Manfredini; Paolo Bruschi; Massimo Piotto; Andrea Ria (ISCAS, 2025)