Exploiting binary translation for fast ASIP design space exploration on FPGAs. - Sebastiano Pomata; Paolo Meloni; Giuseppe Tuveri; Luigi Raffo; Menno Lindwer (DATE, 2012)

ASAM: Automatic Architecture Synthesis and Application Mapping. - Lech Józwiak; Menno Lindwer; Rosilde Corvino; Paolo Meloni; Laura Micconi; Jan Madsen; Erkan Diken; Deepak Gangadharan; Roel Jordans; Sebastiano Pomata; Paul Pop; Giuseppe Tuveri; et al. (DSD, 2012)

System Adaptivity and Fault-Tolerance in NoC-based MPSoCs: The MADNESS Project Approach. - Paolo Meloni; Giuseppe Tuveri; Luigi Raffo; Emanuele Cannella; Todor P. Stefanov; Onur Derin; Leandro Fiorin; Mariagiovanna Sami (DSD, 2012)

Adaptivity Support for MPSoCs Based on Process Migration in Polyhedral Process Networks. - Emanuele Cannella; Onur Derin; Paolo Meloni; Giuseppe Tuveri; Todor P. Stefanov (VLSI Design, 2012)

Enabling Fast ASIP Design Space Exploration: An FPGA-Based Runtime Reconfigurable Prototyper. - Paolo Meloni; Sebastiano Pomata; Giuseppe Tuveri; Simone Secchi; Luigi Raffo; Menno Lindwer (VLSI Design, 2012)

A runtime adaptive H.264 video-decoding MPSoC platform. - Giuseppe Tuveri; Simone Secchi; Paolo Meloni; Luigi Raffo; Emanuele Cannella (DASIP, 2013)

A Low Overhead Self-adaptation Technique for KPN Applications on NoC-based MPSoCs. - Onur Derin; Prasanth Kuncheerath Ramankutty; Paolo Meloni; Giuseppe Tuveri (PECCS, 2013)

A system-level approach to adaptivity and fault-tolerance in NoC-based MPSoCs: The MADNESS project. - Onur Derin; Emanuele Cannella; Giuseppe Tuveri; Paolo Meloni; Todor P. Stefanov; Leandro Fiorin; Luigi Raffo; Mariagiovanna Sami (Microprocess. Microsystems, 2013)

ASAM: Automatic architecture synthesis and application mapping. - Lech Józwiak; Menno Lindwer; Rosilde Corvino; Paolo Meloni; Laura Micconi; Jan Madsen; Erkan Diken; Deepak Gangadharan; Roel Jordans; Sebastiano Pomata; Paul Pop; Giuseppe Tuveri; et al. (Microprocess. Microsystems, 2013)

Integrated support for Adaptivity and Fault-tolerance in MPSoCs. - Giuseppe Tuveri (2013)

A Stream Buffer Mechanism for Pervasive Splitting Transformations on Polyhedral Process Networks. - Paolo Meloni; Giuseppe Tuveri; Luigi Raffo; Igor Loi; Francesco Conti 001 (MES, 2014)

Online process transformation for polyhedral process networks in shared-memory MPSoCs. - Paolo Meloni; Giuseppe Tuveri; Luigi Raffo; Igor Loi; Francesco Conti 001 (MECO, 2014)

A Custom MPSoC Architecture With Integrated Power Management for Real-Time Neural Signal Decoding. - Nicola Carta; Paolo Meloni; Giuseppe Tuveri; Danilo Pani; Luigi Raffo (IEEE J. Emerg. Sel. Topics Circuits Syst., 2014)

Exploring custom heterogeneous MPSoCs for real-time neural signal decoding. - Paolo Meloni; Giuseppe Tuveri; Danilo Pani; Luigi Raffo; Francesca Palumbo (DASIP, 2015)

MPSoCs for real-time neural signal decoding: A low-power ASIP-based implementation. - Paolo Meloni; Francesca Palumbo; Claudio Rubattu; Giuseppe Tuveri; Danilo Pani; Luigi Raffo (Microprocess. Microsystems, 2016)

On-the-fly adaptivity for process networks over shared-memory platforms. - Giuseppe Tuveri; Paolo Meloni; Francesca Palumbo; Giovanni Pietro Seu; Igor Loi; Francesco Conti 001; Luigi Raffo (Microprocess. Microsystems, 2016)

On-FPGA Real-Time Processing of Biological Signals From High-Density MEAs: a Design Space Exploration. - Giovanni Pietro Seu; Gian Nicola Angotzi; Giuseppe Tuveri; Luigi Raffo; Luca Berdondini; Alessandro Maccione; Paolo Meloni (IPDPS Workshops, 2017)

Real-Time neural signal decoding on heterogeneous MPSocs based on VLIW ASIPs. - Paolo Meloni; Claudio Rubattu; Giuseppe Tuveri; Danilo Pani; Luigi Raffo; Francesca Palumbo (J. Syst. Archit., 2017)