Design and algorithm for clock gating and flip-flop co-optimization. - Giyoung Yang; Taewhan Kim 001 (ICCAD, 2018)

3nm Gate-All-Around (GAA) Design-Technology Co-Optimization (DTCO) for succeeding PPA by Technology. - Taejoong Song; Hakchul Jung; Giyoung Yang; Hoyoung Tang; Hayoung Kim; Dongwook Seo; Hoonki Kim; Woojin Rim; Sanghoon Baek; Sangyeop Baeck; Jonghoon Jung (CICC, 2022)

Standard Cell Design Optimization with Advanced MOL Technology in 3nm GAA Process. - Giyoung Yang; Hakchul Jung; Jinyoung Lim; Jaewoo Seo; Ingyum Kim; Jisu Yu; Hyeoungyu You; Jeongsoon Kong; Garoom Kim; Minjae Jeong; Chanhee Park; Sera An; et al. (VLSI Technology and Circuits, 2022)