A field programmable system chip which combines FPGA and ASIC circuitry. - William B. Andrew; Glenn Carl; Ravi K. Charath; James F. Hoff; Ron Modo; Hung Nguyen; William Smith; David Rhein; Joe Schulingkamp; Carolyn W. Spivak; James P. Steward; Akila Subramaniam (CICC, 1999)

Path preserving scale down for validation of internet inter-domain routing protocols. - Glenn Carl; Shashi Phoha; George Kesidis; Bharat B. Madan (WSC, 2006)

Wavelet based Denial-of-Service detection. - Glenn Carl; Richard R. Brooks; Suresh Rai (Comput. Secur., 2006)

Denial-of-Service Attack-Detection Techniques. - Glenn Carl; George Kesidis; Richard R. Brooks; Suresh Rai (IEEE Internet Comput., 2006)

Large-scale testing of the Internet's Border Gateway Protocol (BGP) via topological scale-down. - Glenn Carl; George Kesidis (ACM Trans. Model. Comput. Simul., 2008)

Performance of BGP among mobile military networks. - Glenn Carl; Scott Arbiv; David Ward (MILCOM, 2011)

Modeling a policy-capable path-vector routing protocol using Jacobi iteration over a path algebra. - Glenn Carl; George Kesidis (Comput. Networks, 2011)

Using hybrid simulation/emulation for experimental assessment of routing policy on mission outcomes. - Glenn Carl; Joshua Van Hook (MILCOM, 2012)

Developing a Series of AI Challenges for the United States Department of the Air Force. - Vijay Gadepally; Gregory Angelides; Andrei Barbu; Andrew Bowne; Laura J. Brattain; Tamara Broderick; Armando Cabrera; Glenn Carl; Ronisha Carter; Miriam Cha; Emilie Cowen; Jesse Cummings; et al. (CoRR, 2022)