On optimal extraction of combinational logic and don't care sets from hardware description languages. - Glenn Colón-Bonet; Eric M. Schwarz; D. G. Bostick; Gary D. Hachtel; Michael R. Lightner (ICCAD, 1989)

The implementation of the Itanium 2 microprocessor. - Samuel D. Naffziger; Glenn Colón-Bonet; Timothy C. Fischer; Reid J. Riedlinger; Thomas J. Sullivan; Tom Grutkowski (IEEE J. Solid State Circuits, 2002)

Multiplier Evolution: A Family of Multiplier VLSI Implementations. - Glenn Colón-Bonet; Paul Winterrowd Jr. (Comput. J., 2008)

Lessons from at-speed scan deployment on an Intel® Itanium® microprocessor. - Pankaj Pant; Joshua Zelman; Glenn Colón-Bonet; Jennifer Flint; Steve Yurash (ITC, 2010)

Adapting an industrial memory BIST solution for testing CAMs. - Jais Abraham; Uttam Garg; Glenn Colón-Bonet; Ramesh Sharma; Chennian Di; Benoit Nadeau-Dostie; Etienne Racine; Martin Keim (ITC-Asia, 2017)

Streaming Scan Network (SSN): An Efficient Packetized Data Network for Testing of Complex SoCs. - Jean-François Côté; Mark Kassab; Wojciech Janiszewski; Ricardo Rodrigues 008; Reinhard Meier; Bartosz Kaczmarek; Peter Orlando; Geir Eide; Janusz Rajski; Glenn Colón-Bonet; Naveen Mysore; Ya Yin; et al. (ITC, 2020)

Maximizing Stress Coverage by Novel DFT Techniques and Relaxed Timing Closure. - Arani Sinha; Glenn Colón-Bonet; Michael Fahy; Pankaj Pant; Haijing Mao; Akhilesh Shukla (ITC, 2023)