Performance and resource optimization of NoC router architecture for master and slave IP cores. - Glenn Leary; Krishna Mehta; Karam S. Chatha (CODES+ISSS, 2007)

Automated technique for design of NoC with minimal communication latency. - Glenn Leary; Karam S. Chatha (CODES+ISSS, 2009)

Design of Network-on-Chip Architectures With a Genetic Algorithm-Based Technique. - Glenn Leary; Krishnan Srinivasan; Krishna Mehta; Karam S. Chatha (IEEE Trans. Very Large Scale Integr. Syst., 2009)

A holistic approach to network-on-chip synthesis. - Glenn Leary; Karam S. Chatha (CODES+ISSS, 2010)

Design of NoC for SoC with Multiple Use Cases Requiring Guaranteed Performance. - Glenn Leary; Karam S. Chatha (VLSI Design, 2010)

System-level synthesis of memory architecture for stream processing sub-systems of a MPSoC. - Glenn Leary; Weijia Che; Karam S. Chatha (DAC, 2012)

System-Level Synthesis of Dataplane Subsystems for MPSoCs. - Glenn Leary (2013)