Predictive Techniques for Aggressive Load Speculation. - Glenn Reinman; Brad Calder (MICRO, 1998)

Classifying load and store instructions for memory renaming. - Glenn Reinman; Brad Calder; Dean M. Tullsen; Gary S. Tyson; Todd M. Austin (International Conference on Supercomputing, 1999)

Selective Value Prediction. - Brad Calder; Glenn Reinman; Dean M. Tullsen (ISCA, 1999)

A Scalable Front-End Architecture for Fast Instruction Delivery. - Glenn Reinman; Todd M. Austin; Brad Calder (ISCA, 1999)

Fetch Directed Instruction Prefetching. - Glenn Reinman; Brad Calder; Todd M. Austin (MICRO, 1999)

A Comparative Survey of Load Speculation Architectures. - Brad Calder; Glenn Reinman (J. Instr. Level Parallelism, 2000)

Optimizations Enabled by a Decoupled Front-End Architecture. - Glenn Reinman; Brad Calder; Todd M. Austin (IEEE Trans. Computers, 2001)

High Performance and Energy Efficient Serial Prefetch Architecture. - Glenn Reinman; Brad Calder; Todd M. Austin (ISHPC, 2002)

Microarchitecture evaluation with physical planning. - Jason Cong; Ashok Jagannathan; Glenn Reinman; Michail Romesis (DAC, 2003)

Just Say No: Benefits of Early Cache Miss Determinatio. - Gokhan Memik; Glenn Reinman; William H. Mangione-Smith (HPCA, 2003)

Reducing energy and delay using efficient victim caches. - Gokhan Memik; Glenn Reinman; William H. Mangione-Smith (ISLPED, 2003)

Scaling the issue window with look-ahead latency prediction. - Yongxiang Liu; Anahita Shayesteh; Gokhan Memik; Glenn Reinman (ICS, 2004)

Low-Overhead Core Swapping for Thermal Management. - Eren Kursun; Glenn Reinman; Suleyman Sair; Anahita Shayesteh; Timothy Sherwood (PACS, 2004)

Using a serial cache for energy efficient instruction fetching. - Glenn Reinman; Brad Calder (J. Syst. Archit., 2004)

Microarchitecture evaluation with floorplanning and interconnect pipelining. - Ashok Jagannathan; Hannah Honghua Yang; Kris Konigsfeld; Dan Milliron; Mosur Mohan; Michail Romesis; Glenn Reinman; Jason Cong (ASP-DAC, 2005)

Fast and fair: data-stream quality of service. - Thomas Y. Yeh; Glenn Reinman (CASES, 2005)

Instruction set extension with shadow registers for configurable processors. - Jason Cong; Yiping Fan; Guoling Han; Ashok Jagannathan; Glenn Reinman; Zhiru Zhang (FPGA, 2005)

Reducing the Energy of Speculative Instruction Schedulers. - Yongxiang Liu; Gokhan Memik; Glenn Reinman (ICCD, 2005)

Reducing the Latency and Area Cost of Core Swapping through Shared Helper Engines. - Anahita Shayesteh; Eren Kursun; Timothy Sherwood; Suleyman Sair; Glenn Reinman (ICCD, 2005)

Tornado warning: the perils of selective replay in multithreaded processors. - Yongxiang Liu; Anahita Shayesteh; Gokhan Memik; Glenn Reinman (ICS, 2005)

Understanding the energy efficiency of SMT and CMP with multiclustering. - Jason Cong; Ashok Jagannathan; Glenn Reinman; Yuval Tamir (ISLPED, 2005)

Precise Instruction Scheduling. - Gokhan Memik; Glenn Reinman; William H. Mangione-Smith (J. Instr. Level Parallelism, 2005)

Dynamically configurable shared CMP helper engines for improved performance. - Anahita Shayesteh; Glenn Reinman; Norman P. Jouppi; Suleyman Sair; Timothy Sherwood (SIGARCH Comput. Archit. News, 2005)

An automated design flow for 3D microarchitecture evaluation. - Jason Cong; Ashok Jagannathan; Yuchun Ma; Glenn Reinman; Jie Wei; Yan Zhang (ASP-DAC, 2006)

Improving the performance and power efficiency of shared helpers in CMPs. - Anahita Shayesteh; Glenn Reinman; Norman P. Jouppi; Timothy Sherwood; Suleyman Sair (CASES, 2006)

Handheld System Energy Reduction by OS-Driven Refresh. - Vasily G. Moshnyaga; Hoa Vo; Glenn Reinman; Miodrag Potkonjak (PATMOS, 2006)

Enabling real-time physics simulation in future interactive entertainment. - Thomas Y. Yeh; Petros Faloutsos; Glenn Reinman (Sandbox@SIGGRAPH, 2006)

An Evaluation of Deeply Decoupled Cores. - Eren Kursun; Anahita Shayesteh; Suleyman Sair; Timothy Sherwood; Glenn Reinman (J. Instr. Level Parallelism, 2006)

Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. - Yuchun Ma; Zhuoyuan Li 003; Jason Cong; Xianlong Hong; Glenn Reinman; Sheqin Dong; Qiang Zhou 001 (ASP-DAC, 2007)

Fine grain 3D integration for microarchitecture design through cube packing exploration. - Yongxiang Liu; Yuchun Ma; Eren Kursun; Glenn Reinman; Jason Cong (ICCD, 2007)

ParallAX: an architecture for real-time physics. - Thomas Y. Yeh; Petros Faloutsos; Sanjay J. Patel; Glenn Reinman (ISCA, 2007)

Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh. - Vasily G. Moshnyaga; Hua Vo; Glenn Reinman; Miodrag Potkonjak (ISCAS, 2007)

The Art of Deception: Adaptive Precision Reduction for Area Efficient Physics Acceleration. - Thomas Y. Yeh; Petros Faloutsos; Milos D. Ercegovac; Sanjay J. Patel; Glenn Reinman (MICRO, 2007)

Accelerating Sequential Applications on CMPs Using Core Spilling. - Jason Cong; Guoling Han; Ashok Jagannathan; Glenn Reinman; Krzysztof Rutkowski (IEEE Trans. Parallel Distributed Syst., 2007)

CMP network-on-chip overlaid with multi-band RF-interconnect. - M. Frank Chang; Jason Cong; Adam Kaplan; Mishali Naik; Glenn Reinman; Eran Socher; Sai-Wang Tam (HPCA, 2008)

MC-Sim: an efficient simulation tool for MPSoC designs. - Jason Cong; Karthik Gururaj; Guoling Han; Adam Kaplan; Mishali Naik; Glenn Reinman (ICCAD, 2008)

RF interconnects for communications on-chip. - M.-C. Frank Chang; Eran Socher; Sai-Wang Tam; Jason Cong; Glenn Reinman (ISPD, 2008)

Power reduction of CMP communication networks via RF-interconnects. - M.-C. Frank Chang; Jason Cong; Adam Kaplan; Chunyue Liu; Mishali Naik; Jagannath Premkumar; Glenn Reinman; Eran Socher; Sai-Wang Tam (MICRO, 2008)

Watch Out! A Framework for Evaluating Steering Behaviors. - Shawn Singh; Mishali Naik; Mubbasir Kapadia; Petros Faloutsos; Glenn Reinman (MIG, 2008)

Investigating the effects of fine-grain three-dimensional integration on microarchitecture design. - Yuchun Ma; Yongxiang Liu; Eren Kursun; Glenn Reinman; Jason Cong (ACM J. Emerg. Technol. Comput. Syst., 2008)

An Open Framework for Developing, Evaluating, and Sharing Steering Algorithms. - Shawn Singh; Mubbasir Kapadia; Petros Faloutsos; Glenn Reinman (MIG, 2009)

A scalable micro wireless interconnect structure for CMPs. - Suk-Bok Lee; Sai-Wang Tam; Ioannis Pefkianakis; Songwu Lu; M. Frank Chang; Chuanxiong Guo; Glenn Reinman; Chunyi Peng 001; Mishali Naik; Lixia Zhang 001; Jason Cong (MobiCom, 2009)

SteerBug: an interactive framework for specifying and detecting steering behaviors. - Mubbasir Kapadia; Shawn Singh; Brian F. Allen; Glenn Reinman; Petros Faloutsos (Symposium on Computer Animation, 2009)

Multiband RF-interconnect for reconfigurable network-on-chip communications. - Jason Cong; Mau-Chung Frank Chang; Glenn Reinman; Sai-Wang Tam (SLIP, 2009)

SteerBench: a benchmark suite for evaluating steering behaviors. - Shawn Singh; Mubbasir Kapadia; Petros Faloutsos; Glenn Reinman (Comput. Animat. Virtual Worlds, 2009)

Fool me twice: Exploring and exploiting error tolerance in physics-based animation. - Thomas Y. Yeh; Glenn Reinman; Sanjay J. Patel; Petros Faloutsos (ACM Trans. Graph., 2009)

ACES: application-specific cycle elimination and splitting for deadlock-free routing on irregular network-on-chip. - Jason Cong; Chunyue Liu; Glenn Reinman (DAC, 2010)

RF-Interconnect for Future Network-On-Chip. - Sai-Wang Tam; Eran Socher; Mau-Chung Frank Chang; Jason Cong; Glenn D. Reinman (Low Power Networks-on-Chip, 2011)

Accelerating vision and navigation applications on a customizable platform. - Jason Cong; Beayna Grigorian; Glenn Reinman; Marco Vitanza (ASAP, 2011)

HC-Sim: a fast and exact l1 cache simulator with scratchpad memory co-simulation support. - Yu-Ting Chen 003; Jason Cong; Glenn Reinman (CODES+ISSS, 2011)

The DIMM tree architecture: A high bandwidth and scalable memory system. - Kanit Therdsteerasukdi; Gyungsu Byun; Jeremy Ir; Glenn Reinman; Jason Cong; M. Frank Chang (ICCD, 2011)

An energy-efficient adaptive hybrid cache. - Jason Cong; Karthik Gururaj; Hui Huang 001; Chunyue Liu; Glenn Reinman; Yi Zou (ISLPED, 2011)

An 8.4Gb/s 2.5pJ/b mobile memory I/O interface using simultaneous bidirectional Dual (Base+RF) band signaling. - Gyungsu Byun; Yanghyo Kim; Jongsun Kim; Sai-Wang Tam; Hsieh-Hung Hsieh; P.-Y. Wu; Chewnpu Jou; Jason Cong; Glenn Reinman; Mau-Chung Frank Chang (ISSCC, 2011)

Improved Benchmarking for Steering Algorithms. - Mubbasir Kapadia; Matthew Wang; Glenn Reinman; Petros Faloutsos (MIG, 2011)

Scenario Space: Characterizing Coverage, Quality, and Failure of SteeringAlgorithms. - Mubbasir Kapadia; Matthew Wang; Shawn Singh; Glenn Reinman; Petros Faloutsos (Symposium on Computer Animation, 2011)

Behavior authoring for crowd simulations. - Mubbasir Kapadia; Shawn Singh; Glenn Reinman; Petros Faloutsos (SI3D, 2011)

A modular framework for adaptive agent-based steering. - Shawn Singh; Mubbasir Kapadia; William Hewlett; Glenn Reinman; Petros Faloutsos (SI3D, 2011)

A Behavior-Authoring Framework for Multiactor Simulations. - Mubbasir Kapadia; Shawn Singh; Glenn Reinman; Petros Faloutsos (IEEE Computer Graphics and Applications, 2011)

Customizable Domain-Specific Computing. - Jason Cong; Glenn Reinman; Alex A. T. Bui; Vivek Sarkar (IEEE Des. Test Comput., 2011)

Footstep navigation for dynamic crowds. - Shawn Singh; Mubbasir Kapadia; Glenn Reinman; Petros Faloutsos (Comput. Animat. Virtual Worlds, 2011)

Compilation and architecture support for customized vector instruction extension. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Hui Huang 001; Bin Liu 006; Raghu Prabhakar; Glenn Reinman; Marco Vitanza (ASP-DAC, 2012)

A 60GHz on-chip RF-Interconnect with λ/4 coupler for 5Gbps bi-directional communication and multi-drop arbitration. - Hao Wu 026; Lan Nan; Sai-Wang Tam; Hsieh-Hung Hsieh; Chewnpu Jou; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (CICC, 2012)

Architecture support for accelerator-rich CMPs. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Beayna Grigorian; Glenn Reinman (DAC, 2012)

Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design. - Yu-Ting Chen 003; Jason Cong; Hui Huang 001; Bin Liu 006; Chunyue Liu; Miodrag Potkonjak; Glenn Reinman (DATE, 2012)

Static and dynamic co-optimizations for blocks mapping in hybrid caches. - Yu-Ting Chen 003; Jason Cong; Hui Huang 001; Chunyue Liu; Raghu Prabhakar; Glenn Reinman (ISLPED, 2012)

CHARM: a composable heterogeneous accelerator-rich microprocessor. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Beayna Grigorian; Glenn Reinman (ISLPED, 2012)

BiN: a buffer-in-NUCA scheme for accelerator-rich CMPs. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Chunyue Liu; Glenn Reinman (ISLPED, 2012)

An 8Gb/s/pin 4pJ/b/pin Single-T-Line dual (base+RF) band simultaneous bidirectional mobile memory I/O interface with inter-channel interference suppression. - Yanghyo Kim; Gyungsu Byun; Adrian Tang 002; Chewnpu Jou; Hsieh-Hung Hsieh; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (ISSCC, 2012)

Analysis of Noncoherent ASK Modulation-Based RF-Interconnect for Memory Interface. - Yanghyo Kim; Sai-Wang Tam; Gyungsu Byun; Hao Wu 026; Lan Nan; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Utilizing Radio-Frequency Interconnect for a Many-DIMM DRAM System. - Kanit Therdsteerasukdi; Gyungsu Byun; Jeremy Ir; Glenn Reinman; Jason Cong; Mau-Chung Frank Chang (IEEE J. Emerg. Sel. Topics Circuits Syst., 2012)

Utilizing RF-I and intelligent scheduling for better throughput/watt in a mobile GPU memory system. - Kanit Therdsteerasukdi; Gyungsu Byun; Jason Cong; M. Frank Chang; Glenn Reinman (ACM Trans. Archit. Code Optim., 2012)

Parallelized egocentric fields for autonomous navigation. - Mubbasir Kapadia; Shawn Singh; William Hewlett; Glenn Reinman; Petros Faloutsos (Vis. Comput., 2012)

Composable accelerator-rich microprocessor enhanced for adaptivity and longevity. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Beayna Grigorian; Hui Huang 001; Glenn Reinman (ISLPED, 2013)

Stream arbitration: Towards efficient bandwidth utilization for emerging on-chip interconnects. - Chunhua Xiao; M.-C. Frank Chang; Jason Cong; Michael Gill; Zhangqin Huang; Chunyue Liu; Glenn Reinman; Hao Wu 026 (ACM Trans. Archit. Code Optim., 2013)

Dynamically adaptive and reliable approximate computing using light-weight error analysis. - Beayna Grigorian; Glenn Reinman (AHS, 2014)

Accelerator-Rich Architectures: Opportunities and Progresses. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Beayna Grigorian; Karthik Gururaj; Glenn Reinman (DAC, 2014)

Architecture Support for Domain-Specific Accelerator-Rich CMPs. - Jason Cong; Mohammad Ali Ghodrat; Michael Gill; Beayna Grigorian; Glenn Reinman (ACM Trans. Embed. Comput. Syst., 2014)

On-chip interconnection network for accelerator-rich architectures. - Jason Cong; Michael Gill; Yuchen Hao; Glenn Reinman; Bo Yuan (DAC, 2015)

BRAINIAC: Bringing reliable accuracy into neurally-implemented approximate computing. - Beayna Grigorian; Nazanin Farahpour; Glenn Reinman (HPCA, 2015)

PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration. - Jason Cong; Zhenman Fang; Michael Gill; Glenn Reinman (ICCAD, 2015)

Accelerating Divergent Applications on SIMD Architectures Using Neural Networks. - Beayna Grigorian; Glenn Reinman (ACM Trans. Archit. Code Optim., 2015)

Customizable Computing - Yu-Ting Chen 003; Jason Cong; Michael Gill; Glenn Reinman; Bingjun Xiao (Morgan & Claypool Publishers, 2015)

A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. - Young-kyu Choi; Jason Cong; Zhenman Fang; Yuchen Hao; Glenn Reinman; Peng Wei 004 (DAC, 2016)

Supporting Address Translation for Accelerator-Centric Architectures. - Yuchen Hao; Zhenman Fang; Glenn Reinman; Jason Cong (HPCA, 2017)

AIM: accelerating computational genomics through scalable and noninvasive accelerator-interposed memory. - Jason Cong; Zhenman Fang; Michael Gill; Farnoosh Javadi; Glenn Reinman (MEMSYS, 2017)

CHILL: a system for fine-grained mapping of chained high impact long-latency load phases on tightly coupled heterogeneous multi-cores. - Robert Chen 002; Glenn Reinman (Int. J. High Perform. Syst. Archit., 2017)

Understanding Performance Gains of Accelerator-Rich Architectures. - Zhenman Fang; Farnoosh Javadi; Jason Cong; Glenn Reinman (ASAP, 2019)

In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms. - Young-kyu Choi; Jason Cong; Zhenman Fang; Yuchen Hao; Glenn Reinman; Peng Wei 004 (ACM Trans. Reconfigurable Technol. Syst., 2019)

Reconfigurable Accelerator Compute Hierarchy: A Case Study using Content-Based Image Retrieval. - Nazanin Farahpour; Yuchen Hao; Zhenman Fang; Glenn Reinman (IISWC, 2020)

FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling (WiP Paper). - Nazanin Farahpour; Zhenman Fang; Glenn Reinman (LCTES, 2020)

BeaconGNN: Large-Scale GNN Acceleration with Out-of-Order Streaming In-Storage Computing. - Yuyue Wang 001; Xiurui Pan; Yuda An; Jie Zhang 048; Glenn Reinman (HPCA, 2024)

Fine Grain 3D Integration for Microarchitecture Design Through Cube Packing Exploration. - Yongxiang Liu; Yuchun Ma; Eren Kurshan; Glenn Reinman; Jason Cong (CoRR, 2025)