Single low-gain amplifier compensated hybrid delta-sigma modulator. - Arshad Hussain; Goang Seong Choi (IET Circuits Devices Syst., 2019)

12 bit 3.072 GS/s 32-way time-interleaved pipelined ADC with digital background calibration for wideband fully digital receiver application in 65 nm complementary metal-oxide-semiconductor. - Waleed Hussain Siddiqui; Goang Seong Choi (IET Circuits Devices Syst., 2020)